#ifndef FREERTOS_RISC_V_CHIP_SPECIFIC_EXTENSIONS_H
#define FREERTOS_RISC_V_CHIP_SPECIFIC_EXTENSIONS_H

/* Hazard3 adds no architectural registers to the base RV32I context. */
#define portasmHAS_MTIME                  1
#define portasmHAS_SIFIVE_CLINT           0
#define portasmADDITIONAL_CONTEXT_SIZE    0

.macro portasmSAVE_ADDITIONAL_REGISTERS
.endm

.macro portasmRESTORE_ADDITIONAL_REGISTERS
.endm

#endif