feat: add lab-rv32i-freertos-isr-drivers card
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# K15 — Explicit FromISR, UART and GPIO wrappers
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K15 routes a real Hazard3 machine-external interrupt through the official
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FreeRTOS RISC-V trap path. The C++ layer keeps task and ISR views explicit:
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UartTaskView/GpioTaskView contain configuration and output operations, while
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UartIsrView/GpioIsrView expose only bounded register reads and clears.
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One IsrContext accumulates wake requests from two primitives:
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UART RX bytes: 0x41, 0x42
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static queue capacity: 1
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accepted: 0x41
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overflow policy: drop-newest -> 0x42 dropped
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GPIO edge: task notification
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higherPriorityTaskWoken: true
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yield_if_needed calls: exactly 1
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The high-priority receiver consumes byte 0x41 and notification count 1, then
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drives GPIO output high. It runs before the interrupted stimulus continues,
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which proves the ISR-requested context switch.
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## Build
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make check
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The gate includes a host contract test, freestanding ABI/storage checks and a
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real external-IRQ simulation on Hazard3.
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## Debug
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riscv64-unknown-elf-gdb build/task01_isr_drivers/prog.elf
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b isr_drivers_debug_checkpoint
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p/x g_mcause
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p g_rx_queued
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p g_rx_dropped
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p/x g_receiver_byte
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p/x g_dropped_byte
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p g_higher_priority_task_woken
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p g_isr_yield_calls
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p g_stimulus_after_seen_by_receiver
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p g_receiver_done_at_stimulus_resume
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p g_isr_drivers_pass
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## Scope boundary
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ISR code cannot call a blocking task API. Parsing, debounce and GPIO policy
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belong to a task. Backpressure is explicit: this exercise uses drop-newest and
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counts the dropped byte. The handler creates one IsrContext and calls
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yield_if_needed once, after all FromISR publications and peripheral clears.
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