lab-rv32i-asm-addresses-memory/json/card_source.json

{
  "$schema": "../../../../tools/card-layouts/schemas/card-source.schema.json", "schema": "esc-card-source.v1",
  "card": {"id": "mpabi-inf-rv32i-asm-07-addresses-memory", "series": "rv32i-asm", "series_title": "ASM · RV32I From Blinker to RISC-V", "number": "07", "count": "09", "slug": "addresses-memory", "title": "L07 · Addresses and Memory", "topic": "LUI/AUIPC, adres bajtowy, RAM i wyrównanie", "project": "Tor adresowy minimalnego rdzenia", "subject": "Informatyka", "level": "Rok 1 · RTL · RV32I", "revision_date": "2026-07-21T00:00:00+02:00", "status": "Gotowa do symulacji", "version": "v00.01", "uuid": "4edb5d8a-fc39-5f96-b462-cb421586ef68", "author": "M. Pabiszczak", "year": "2026"},
  "generated": {"tex": "doc/generated/main.tex", "html": "web/index.html", "html_css": "web/style.css", "react_app": true, "html_tree_inspector": false}, "template": "templates/karta-klasyczna.json",
  "title_block": {"category": "KARTA PRACY · INFORMATYKA · RTL", "standard": "ISO 7200", "prepared_by": "M. Pabiszczak", "prepared_on": "21.07.2026", "checked_by": "testy automatyczne", "approved_by": "—", "url": "http://localhost:8080", "repository_url": "https://gitea.local/edu-inf/lab-rv32i-asm-addresses-memory", "revision": "1", "issued_on": "21.07.2026", "series": "RV32I-ASM-07", "document_type": "karta pracy", "tool": "card-layouts", "sheet": "1 / 1", "show_qr": false, "show_repository_qr": false, "height_cm": 3, "repeat_on_every_page": true, "replace_front_matter": true},
  "front_page_scope": {"title": "Cel karty", "content_tex": "Uczeń tworzy wartości upper-immediate, implementuje RAM słowowy i łączy go z kontrolowanym sumatorem adresu.", "scope_title": "Zakres tasków", "scope_table": {"headers": ["Krok", "Numer tasku", "Najważniejsza idea", "Priorytet", "Status", "Version"], "rows": [{"chapter": "9", "task": "Task01", "idea_tex": "LUI i AUIPC", "priority": "obowiązkowe", "status": "ready", "version": "v00.01"}, {"chapter": "9", "task": "Task02", "idea_tex": "wyrównany RAM słowowy", "priority": "obowiązkowe", "status": "ready", "version": "v00.01"}, {"chapter": "9", "task": "Task03", "idea_tex": "base + immediate + RAM", "priority": "obowiązkowe", "status": "ready", "version": "v00.01"}]}},
  "side_margin_tree_layout": {"columns": [{"id": "zawodowe", "label": "TECH", "side": "left", "tree": "WE -> EK -> KW", "description": "Sumator adresu, wyrównanie i RAM."}, {"id": "ogolne", "label": "OG", "side": "right", "tree": "WE -> EN -> KW", "description": "Analiza adresu bajtowego."}]},
  "learning_effects": {"RV07.EN01": {"bloom_level": "Analiza", "label": "Adres", "text": "Uczeń rozróżnia adres bajtowy, indeks słowa i bity wyrównania.", "assessment_criteria": ["RV07.KW01"]}, "RV07.EK01": {"bloom_level": "Tworzenie", "label": "Pamięć", "text": "Uczeń implementuje upper-immediate oraz chroniony tor RAM.", "assessment_criteria": ["RV07.KW01"]}},
  "assessment_criteria": {"RV07.KW01": {"text": "LUI/AUIPC, dwa słowa RAM i dostęp base+immediate są zgodne w modelu i RTL, a fault blokuje zapis.", "learning_effects": ["RV07.EN01", "RV07.EK01"]}},
  "educational_requirements": {"RV07.WE01": {"text": "Zbudowanie mierzalnego toru adresowego RV32I.", "label": "Adresy i pamięć", "learning_effects": ["RV07.EN01", "RV07.EK01"], "learning_tree": {"schema": "we-learning-tree.v1", "policy": "Niewyrównany dostęp nigdy nie modyfikuje RAM.", "ogolne": [{"effect_ref": "RV07.EN01", "display": "EN IP WO RV07.01", "source": "IP", "official": "RV07.01", "local": "01", "text": "Uczeń analizuje adres bajtowy.", "kind": "WO", "tree_id": "RV07.WE01.OG.IP.01", "kw": [{"criterion_ref": "RV07.KW01", "display": "KW IP WS RV07.01", "source": "IP", "kind": "WS", "official": "RV07.01", "local": "01", "text": "Bity indeksu i wyrównania są poprawnie wskazane."}] }], "zawodowe": [{"effect_ref": "RV07.EK01", "display": "EK INF04 RV07.01", "source": "I4", "official": "RV07.01", "local": "01", "text": "Uczeń tworzy tor pamięci.", "kind": "EK", "tree_id": "RV07.WE01.TECH.I4.01", "kw": [{"criterion_ref": "RV07.KW01", "display": "KW INF04 RV07.01", "source": "I4", "kind": "KW", "official": "RV07.01", "local": "01", "text": "Odczyt zwraca deadbeef, a misalignment ustawia fault."}] }]}}},
  "sections": [
    {"title": "Task01 · Upper immediate", "order": 10, "content_kind": "prose", "content_tex": "Umieść \texttt{imm20} w bitach 31:12. LUI zwraca tę wartość, a AUIPC dodaje ją do bieżącego PC.", "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01", "RV07.EK01"], "assessment_criterion_refs": ["RV07.KW01"], "area_tree_refs": ["RV07.WE01.OG.IP.01", "RV07.WE01.TECH.I4.01"], "steps": [{"id": "T01-PREDICT", "title": "Wyznacz LUI i AUIPC dla imm20=12345 oraz PC=100 hex.", "tree_refs": ["RV07.WE01.OG.IP.01"], "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01"], "assessment_criterion_refs": ["RV07.KW01"]}, {"id": "T01-MEASURE", "title": "Porównaj wyniki z modelem i RTL.", "tree_refs": ["RV07.WE01.TECH.I4.01"], "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EK01"], "assessment_criterion_refs": ["RV07.KW01"]}], "assets": [{"path": "assets/address-memory.png", "html_path": "assets/address-memory.svg", "caption": "Sumator tworzy adres bajtowy, a kontrola wyrównania chroni RAM.", "label": "fig:address-memory", "alt": "Diagram base plus immediate, address, align i word RAM.", "kind": "diagram", "width": 0.9}]},
    {"title": "Task02 · RAM słowowy", "order": 20, "content_kind": "prose", "content_tex": "Adresy 0 i 4 wybierają różne słowa. Bity 1:0 muszą być zerowe; w przeciwnym razie fault blokuje zapis.", "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01", "RV07.EK01"], "assessment_criterion_refs": ["RV07.KW01"], "area_tree_refs": ["RV07.WE01.OG.IP.01", "RV07.WE01.TECH.I4.01"], "steps": [{"id": "T02-RAM", "title": "Zapisz dwa słowa i spróbuj zapisu pod adresem 2.", "tree_refs": ["RV07.WE01.OG.IP.01", "RV07.WE01.TECH.I4.01"], "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01", "RV07.EK01"], "assessment_criterion_refs": ["RV07.KW01"]}]},
    {"title": "Task03 · Ścieżka adresu", "order": 30, "content_kind": "prose", "content_tex": "Dodaj signed immediate do base, zapisz słowo i odczytaj je tym samym adresem. Następnie wymuś dostęp niewyrównany.", "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01", "RV07.EK01"], "assessment_criterion_refs": ["RV07.KW01"], "area_tree_refs": ["RV07.WE01.OG.IP.01", "RV07.WE01.TECH.I4.01"], "steps": [{"id": "T03-PATH", "title": "Zmierz adres 0000002c, readback deadbeef i fault dla +2.", "tree_refs": ["RV07.WE01.OG.IP.01", "RV07.WE01.TECH.I4.01"], "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01", "RV07.EK01"], "assessment_criterion_refs": ["RV07.KW01"]}]}
  ],
  "tasks": {"task01": {"prompt_tex": "Zweryfikuj wyniki LUI oraz AUIPC.", "criterion": "lui=12345000 auipc=12345100", "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01", "RV07.EK01"], "assessment_criterion_ref": "RV07.KW01", "links": {"equations": [], "figures": ["fig:address-memory"]}}, "task02": {"prompt_tex": "Zapisz dwa słowa i odrzuć adres niewyrównany.", "criterion": "word0=11223344 word1=aabbccdd misaligned=1", "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01", "RV07.EK01"], "assessment_criterion_ref": "RV07.KW01", "links": {"equations": [], "figures": ["fig:address-memory"]}}, "task03": {"prompt_tex": "Połącz sumator adresu z RAM.", "criterion": "address=0000002c load=deadbeef fault=1", "educational_requirement_refs": ["RV07.WE01"], "learning_effect_refs": ["RV07.EN01", "RV07.EK01"], "assessment_criterion_ref": "RV07.KW01", "links": {"equations": [], "figures": ["fig:address-memory"]}}},
  "tasks_order": ["task01", "task02", "task03"], "mission": "Połącz upper-immediate, adres bajtowy i chronioną pamięć słowową.", "objectives": ["Obliczysz LUI oraz AUIPC.", "Rozdzielisz indeks słowa od bitów wyrównania.", "Zbudujesz tor base+immediate z fault."],
  "agenda": [{"time": "0--20 min", "work": "LUI i AUIPC."}, {"time": "20--45 min", "work": "RAM słowowy."}, {"time": "45--70 min", "work": "Tor adresu i VCD."}],
  "tech_stack": {"software": [{"name": "SystemVerilog", "use": "sumator i RAM"}, {"name": "Verilator", "use": "test i VCD"}, {"name": "stemctl", "use": "profile wykonania"}], "hardware": [{"name": "Brak wymaganego FPGA", "use": "deterministyczna symulacja RTL"}]},
  "theory_refs": {"intro": "RV32I używa adresowania bajtowego, nawet gdy dostęp dotyczy całego słowa.", "known_refs": [], "new_concepts": [{"term": "effective address", "definition": "Suma rejestru bazowego i signed immediate."}, {"term": "alignment fault", "definition": "Odrzucenie dostępu niespełniającego wymaganego wyrównania."}]},
  "container_test": {"title": "Test bez płytki", "commands": ["stemctl test native-amd64 rv32i-asm L07 1", "stemctl test hazard3-sim rv32i-asm L07 2", "stemctl debug hazard3-sim rv32i-asm L07 3"], "pass_condition": "Modele i RTL zwracają trzy komunikaty PASS, a debug zapisuje VCD."},
  "safety_rules": [{"title": "Misalignment fail-closed", "body": "Fault blokuje write enable pamięci."}, {"title": "Adres bajtowy", "body": "Indeks słowa nie może zastąpić pełnego effective address."}],
  "hardware_procedure": [{"step": "1", "action": "Uruchom model LUI/AUIPC.", "condition": "Wyniki zapisane przed RTL."}, {"step": "2", "action": "Sprawdź dwa słowa RAM.", "condition": "Adres 2 nie zmienia pamięci."}, {"step": "3", "action": "Wykonaj zapis, odczyt i fault.", "condition": "Adres 2c, dane deadbeef, VCD zapisany."}], "references": []
}