lab-rv32i-asm-alu/doc/generated/main.tex

% Generated from json/card_source.json by tools/render_card.py.
% Do not edit manually; update the JSON and regenerate.

\documentclass[12pt,a4paper]{article}

\usepackage[T1]{fontenc}
\usepackage{lmodern}
\usepackage[utf8]{inputenc}
\usepackage[polish]{babel}
\usepackage{csquotes}
\usepackage{amsmath}
\usepackage{amssymb}
\usepackage{xcolor}
\usepackage[a4paper,left=2.15cm,right=2.15cm,top=0.5cm,bottom=1cm,headheight=28mm,headsep=3mm,includehead,includefoot]{geometry}
\usepackage{eso-pic}
\usepackage{marginnote}
\usepackage{array}
\usepackage{tabularx}
\usepackage{graphicx}
\usepackage{pdflscape}
\usepackage{float}
\usepackage{silence}
\WarningFilter{soulutf8}{This package is obsolete}
\usepackage{pdfcomment}
\usepackage{enumitem}
\usepackage{needspace}
\usepackage{fancyhdr}
\usepackage{lastpage}
\usepackage{microtype}
\usepackage[most]{tcolorbox}
\usepackage{qrcode}
\IfFileExists{references.bib}{%
  \usepackage[backend=biber,style=numeric,sorting=none]{biblatex}%
  \addbibresource{references.bib}%
}{}

\hypersetup{hidelinks}

\IfFileExists{build-meta.tex}{%
  \input{build-meta.tex}%
}{%
  \newcommand{\BuildCommit}{lokalna}%
}

\newcommand{\DocumentAuthor}{M. Pabiszczak}
\newcommand{\DocumentYear}{2026}
\newcommand{\CardSeries}{rv32i-asm}
\newcommand{\CardSeriesTitle}{ASM · RV32I From Blinker to RISC-V}
\newcommand{\CardNumber}{05}
\newcommand{\CardCount}{09}
\newcommand{\CardSlug}{alu}
\newcommand{\CardVersion}{v00.01}
\newcommand{\CardStatus}{Gotowa do symulacji}
\newcommand{\DocumentUUID}{aabf60d8-9071-5f77-9bbb-2fc500f05358}

\newcommand{\EmptyCheck}{\(\square\)}
\newcommand{\EscAnswerLines}[1][3]{\par\noindent\dotfill\par\noindent\dotfill\par\noindent\dotfill}
\newcommand{\EscWriteRow}[1][2.8em]{\rule{0pt}{#1}}
\setlength{\parindent}{0pt}
\setlength{\parskip}{0.45em}
\setlength{\headheight}{28mm}
\setlength{\headsep}{3mm}
\setlength{\footskip}{8mm}
\setlength{\marginparwidth}{1.5cm}
\setlength{\marginparsep}{0.25cm}
\renewcommand{\arraystretch}{1.22}
% Margin separator lines disabled for layout trial.

\newcommand{\ESCPageResourceHeader}{%
  \begingroup%
  \setlength{\parskip}{0pt}%
  \setlength{\fboxsep}{0pt}%
  \setlength{\fboxrule}{0.35pt}%
  \setlength{\arrayrulewidth}{0.35pt}%
  \noindent\fbox{%
    \begin{minipage}[c][27.5mm][c]{\dimexpr\textwidth-2\fboxrule\relax}%
      \begin{minipage}[c][27mm][c]{\dimexpr\linewidth-24mm-0.35pt\relax}%
        \setlength{\tabcolsep}{0pt}%
        \renewcommand{\arraystretch}{0}%
        \begin{tabularx}{\linewidth}{@{}p{\dimexpr0.50000000\linewidth-\arrayrulewidth\relax}|p{\dimexpr0.15126050\linewidth-\arrayrulewidth\relax}|X@{}}%
          \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{3.2}{3.4}\selectfont\ttfamily\bfseries TITLE}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{7.7}{7.9}\selectfont\ttfamily\bfseries L05 · ALU and the Verilog Assembler}\hspace{0.45mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{3.2}{3.4}\selectfont\ttfamily\bfseries VER.}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{6.6}{6.8}\selectfont\ttfamily\bfseries 1}\hspace{0.45mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{3.2}{3.4}\selectfont\ttfamily\bfseries DATETIME}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{6.4}{6.6}\selectfont\ttfamily\bfseries 21.07.2026}\hspace{0.45mm}}\par} \\%
        \end{tabularx}%
        \par\nointerlineskip%
        \hrule height0.35pt%
        \nointerlineskip%
        \begin{tabularx}{\linewidth}{@{}p{\dimexpr0.50000000\linewidth-\arrayrulewidth\relax}|p{\dimexpr0.25210084\linewidth-\arrayrulewidth\relax}|p{\dimexpr0.14285714\linewidth-\arrayrulewidth\relax}|X@{}}%
          \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{3.2}{3.4}\selectfont\ttfamily\bfseries PROJECT}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{7.7}{7.9}\selectfont\ttfamily\bfseries Etap wykonania minimalnego rdzenia}\hspace{0.45mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{3.2}{3.4}\selectfont\ttfamily\bfseries SERIES}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{6.4}{6.6}\selectfont\ttfamily\bfseries ASM · RV32I From Blinker to RISC-V}\hspace{0.45mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{3.2}{3.4}\selectfont\ttfamily\bfseries CARD}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{6.4}{6.6}\selectfont\ttfamily\bfseries 05/09}\hspace{0.45mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{3.2}{3.4}\selectfont\ttfamily\bfseries SHEET}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{6.4}{6.6}\selectfont\ttfamily\bfseries \thepage/\pageref{LastPage}}\hspace{0.45mm}}\par} \\%
        \end{tabularx}%
        \par\nointerlineskip%
        \hrule height0.35pt%
        \nointerlineskip%
        \begin{tabularx}{\linewidth}{@{}p{\dimexpr0.05882353\linewidth-\arrayrulewidth\relax}|p{\dimexpr0.05042017\linewidth-\arrayrulewidth\relax}|p{\dimexpr0.14705882\linewidth-\arrayrulewidth\relax}|p{\dimexpr0.09243697\linewidth-\arrayrulewidth\relax}|p{\dimexpr0.07563025\linewidth-\arrayrulewidth\relax}|p{\dimexpr0.07563025\linewidth-\arrayrulewidth\relax}|X@{}}%
          \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.15mm}{\fontsize{2.85}{3}\selectfont\ttfamily\bfseries SUBJ.}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{4.45}{4.65}\selectfont\ttfamily\bfseries Inf.}\hspace{0.15mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.15mm}{\fontsize{2.85}{3}\selectfont\ttfamily\bfseries PROG.}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{4.45}{4.65}\selectfont\ttfamily\bfseries —}\hspace{0.15mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.15mm}{\fontsize{2.85}{3}\selectfont\ttfamily\bfseries CORE}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{4.45}{4.65}\selectfont\ttfamily\bfseries —}\hspace{0.15mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.15mm}{\fontsize{2.85}{3}\selectfont\ttfamily\bfseries SCOPE}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{4.45}{4.65}\selectfont\ttfamily\bfseries —}\hspace{0.15mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.15mm}{\fontsize{2.85}{3}\selectfont\ttfamily\bfseries LEVEL}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{4.45}{4.65}\selectfont\ttfamily\bfseries —}\hspace{0.15mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hspace{0.15mm}{\fontsize{2.85}{3}\selectfont\ttfamily\bfseries POS.}\par\nointerlineskip\vspace{0.12mm}\noindent\makebox[\linewidth][r]{{\fontsize{4.45}{4.65}\selectfont\ttfamily\bfseries —}\hspace{0.15mm}}\par} & \parbox[c][6.11722mm][c]{\linewidth}{\hbox to\linewidth{\hspace{0.35mm}{\fontsize{3.4}{3.75}\selectfont\ttfamily\bfseries GITEA UUID}\hfill{\fontsize{3.4}{3.75}\selectfont\ttfamily aabf60d8-9071-5f77-9bbb-2fc500f05358}\hspace{0.35mm}}\par\nointerlineskip\hbox to\linewidth{\hspace{0.35mm}{\fontsize{3.4}{3.75}\selectfont\ttfamily\bfseries CARD UUID} {\fontsize{3.4}{3.75}\selectfont\ttfamily aabf60d8-9071-5f77-9bbb-2fc500f05358}\hfill{\fontsize{3.4}{3.75}\selectfont\ttfamily\bfseries AUTHOR M. Pabiszczak}\hspace{0.35mm}}} \\%
        \end{tabularx}%
        \par\nointerlineskip%
        \hrule height0.35pt%
        \nointerlineskip%
        \begin{tabularx}{\linewidth}{@{}X@{}}%
          \parbox[c][4.07815mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{4.5}{4.85}\selectfont\ttfamily\bfseries GITEA} {\fontsize{4.5}{4.85}\selectfont\ttfamily\href{https://gitea.local/edu-inf/lab-rv32i-asm-alu}{\nolinkurl{https://gitea.local/edu-inf/lab-rv32i-asm-alu}}}} \\%
        \end{tabularx}%
        \par\nointerlineskip%
        \hrule height0.35pt%
        \nointerlineskip%
        \begin{tabularx}{\linewidth}{@{}X@{}}%
          \parbox[c][4.07815mm][c]{\linewidth}{\hspace{0.45mm}{\fontsize{4.5}{4.85}\selectfont\ttfamily\bfseries HTML} {\fontsize{4.5}{4.85}\selectfont\ttfamily\href{http://localhost:8080}{\nolinkurl{http://localhost:8080}}}} \\%
        \end{tabularx}%
      \end{minipage}%
      \vrule width0.35pt%
      \begin{minipage}[c][27mm][c]{24mm}\centering%
        {\tiny QR wyłączony}%
      \end{minipage}%
    \end{minipage}%
  }%
  \endgroup%
}

\pagestyle{fancy}
\fancyhf{}
\fancyhead[C]{\ESCPageResourceHeader}
\fancyfoot[L]{{\fontsize{6.4}{7.0}\selectfont\ttfamily UUID \DocumentUUID}}
\fancyfoot[C]{{\fontsize{6.4}{7.0}\selectfont\ttfamily \DocumentAuthor}}
\fancyfoot[R]{{\fontsize{6.4}{7.0}\selectfont\ttfamily STRONA \thepage/\pageref{LastPage}}}
\renewcommand{\headrulewidth}{0pt}
\renewcommand{\footrulewidth}{0.35pt}

\newcommand{\ESCMarginTag}[4]{%
  \hspace*{#1}\textcolor{#2}{#3~#4}%
}
\newcommand{\ESCSectionBlockStart}{%
  \Needspace{8\baselineskip}%
  \par\vspace{0.35em}%
  \noindent\textcolor{black!28}{\rule{\textwidth}{0.35pt}}%
  \par\vspace{0.15em}%
}
\newcommand{\ESCSectionBlockEnd}{%
  \par\vspace{0.45em}%
}
\newcommand{\ESCTinyStepSeparator}{%
  \par\vspace{0.10em}%
  \noindent{\color{black!18}\leaders\hbox{\rule{0.60em}{0.22pt}\hspace{0.38em}}\hfill\kern0pt}%
  \par\vspace{0.10em}%
}
\newtcolorbox{ESCTaskFrame}[1]{enhanced,breakable,arc=0pt,boxrule=0.35pt,colback=white,colframe=black,boxsep=0pt,left=1.4mm,right=1.4mm,top=0.8mm,bottom=0.8mm,colbacktitle=black!7,coltitle=black,title={\ttfamily\bfseries TASK\quad #1}}
\newtcolorbox{ESCBlockFrame}[1]{enhanced,breakable,arc=0pt,boxrule=0.35pt,colback=white,colframe=black!55,boxsep=0pt,left=1.0mm,right=1.0mm,top=0.6mm,bottom=0.6mm,colbacktitle=black!4,coltitle=black,title={\ttfamily\bfseries BLOCK\quad #1}}
\newtcolorbox{ESCStepFrame}[1]{enhanced,breakable,arc=0pt,boxrule=0.35pt,colback=white,colframe=black!28,boxsep=0pt,left=0.8mm,right=0.8mm,top=0.45mm,bottom=0.45mm,colbacktitle=black!2,coltitle=black,title={\ttfamily STEP\quad #1}}
\newtcolorbox{ESCConclusionFrame}{enhanced,breakable,arc=0pt,boxrule=0.45pt,colback=blue!2,colframe=blue!45!black,boxsep=0pt,left=1.2mm,right=1.2mm,top=0.7mm,bottom=0.7mm,colbacktitle=blue!7,coltitle=black,title={\ttfamily\bfseries WNIOSEK}}

\newcommand{\ESCLearningTreeWidget}{%
  \reversemarginpar
  \marginnote[%
    \begin{minipage}{\marginparwidth}%
    \raggedright
    {\fontsize{3.55}{3.95}\selectfont\ttfamily
      \begin{minipage}[t]{\marginparwidth}%
      \raggedright
      {\bfseries\textcolor{black!65}{TECH}\par}%
      \vspace{0.08em}%
      \hspace*{0.00em}\textcolor{red}{WE~01}\textcolor{black!48}{}\par%
      \hspace*{0.28em}\textcolor{orange!85!black}{EK~INF04~RV05.01}\textcolor{black!48}{\pdftooltip[width=\textwidth]{.01}{Uczeń tworzy etap execute.}}\par%
      \hspace*{0.54em}\textcolor{blue!70!black}{KW~INF04~RV05.01}\textcolor{black!48}{\pdftooltip[width=\textwidth]{.01}{Program kończy się x3=12 i x4=7.}}\par%
      \end{minipage}%
    }%
    \end{minipage}%
  ]{}
  \normalmarginpar

  \marginnote{%
    \begin{minipage}{\marginparwidth}%
    \raggedright
    {\fontsize{3.55}{3.95}\selectfont\ttfamily
    \hspace*{0.06cm}%
      \begin{minipage}[t]{\dimexpr\marginparwidth-0.06cm\relax}%
      \raggedright
      {\bfseries\textcolor{black!65}{OG}\par}%
      \vspace{0.08em}%
      \hspace*{0.00em}\textcolor{red}{WE~01}\textcolor{black!48}{}\par%
      \hspace*{0.28em}\textcolor{green!50!black}{EN~IP~WO~RV05.01}\textcolor{black!48}{\pdftooltip[width=\textwidth]{.01}{Uczeń analizuje wynik bitowy.}}\par%
      \hspace*{0.54em}\textcolor{blue!70!black}{KW~IP~WS~RV05.01}\textcolor{black!48}{\pdftooltip[width=\textwidth]{.01}{Signed, unsigned i przesunięcia mają poprawne wyniki.}}\par%
      \end{minipage}%
    }%
    \end{minipage}%
  }

}

\begin{document}
\sloppy

\vspace{1.0em}
\noindent{\Large\bfseries Cel karty}\par
\vspace{0.35em}
Uczeń implementuje ALU, składa słowa instrukcji R/I i wykonuje program z kontrolowanym writeback.

\vspace{0.8em}
\noindent\textcolor{black!25}{\rule{\textwidth}{0.35pt}}
\vspace{0.7em}
\noindent{\Large\bfseries Zakres tasków}\par
\vspace{0.35em}

\vspace{0.55em}
\small\begin{tabularx}{\textwidth}{@{}>{\ttfamily\raggedright\arraybackslash}p{1.10cm}>{\ttfamily\raggedright\arraybackslash}p{1.45cm}X>{\raggedright\arraybackslash}p{2.50cm}>{\raggedright\arraybackslash}p{1.75cm}>{\ttfamily\raggedright\arraybackslash}p{1.50cm}@{}}
\textbf{Krok} & \textbf{Numer tasku} & \textbf{Najważniejsza idea} & \textbf{Priorytet} & \textbf{Status} & \textbf{Version} \\ \hline
\texttt{6} & \texttt{Task01} & 10 operacji ALU & obowiązkowe & opracowane & \texttt{v00.01} \\ \hline
\texttt{7} & \texttt{Task02} & enkoder formatów R/I & obowiązkowe & opracowane & \texttt{v00.01} \\ \hline
\texttt{7} & \texttt{Task03} & execute i writeback & obowiązkowe & opracowane & \texttt{v00.01} \\ \hline
\end{tabularx}
\normalsize


\vspace{0.8em}
\noindent\textcolor{black!25}{\rule{\textwidth}{0.35pt}}

\clearpage

\ESCSectionBlockStart
\section{Task01 · ALU}
\reversemarginpar
\marginnote[%
  \begin{minipage}{\marginparwidth}%
  \raggedright
  {\fontsize{3.55}{3.95}\selectfont\ttfamily
    \begin{minipage}[t]{\marginparwidth}%
    \raggedright
    {\bfseries\textcolor{black!65}{TECH}\par}%
    \vspace{0.08em}%
    \hspace*{0.00em}\textcolor{red}{WE~01}\textcolor{black!48}{}\par%
    \end{minipage}%
  }%
  \end{minipage}%
]{}[-3.1em]
\normalmarginpar

\marginnote{%
  \begin{minipage}{\marginparwidth}%
  \raggedright
  {\fontsize{3.55}{3.95}\selectfont\ttfamily
  \hspace*{0.06cm}%
    \begin{minipage}[t]{\dimexpr\marginparwidth-0.06cm\relax}%
    \raggedright
    {\bfseries\textcolor{black!65}{OG}\par}%
    \vspace{0.08em}%
    \hspace*{0.00em}\textcolor{red}{WE~01}\textcolor{black!48}{}\par%
    \end{minipage}%
  }%
  \end{minipage}%
}[-3.1em]


\begingroup
\scriptsize\ttfamily\color{black!60}\sloppy
\noindent drzewka: \pdftooltip[width=\textwidth]{D1}{RV05.WE01.OG.IP.01 | WE 01: ALU i writeback. Zbudowanie mierzalnego etapu wykonania RV32I. |\textCR EN IP WO RV05.01: Uczeń analizuje wynik bitowy. | KW IP WS RV05.01: Signed, unsigned i\textCR przesunięcia mają poprawne wyniki.} \pdftooltip[width=\textwidth]{D2}{RV05.WE01.TECH.I4.01 | WE 01: ALU i writeback. Zbudowanie mierzalnego etapu wykonania RV32I.\textCR | EK INF04 RV05.01: Uczeń tworzy etap execute. | KW INF04 RV05.01: Program kończy się x3=12\textCR i x4=7.}\par
\vspace{0.10em}%
\noindent K1: Przewidź wyniki SRA/SRL i SLT/SLTU.\quad D1\par
\ESCTinyStepSeparator
\noindent K2: Porównaj dziesięć wektorów i zapisz VCD.\quad D2\par
\par\vspace{0.18em}%
\endgroup

Sprawdź dziesięć operacji. \texttt{SRA} i \texttt{SLT} używają interpretacji signed; \texttt{SRL} i \texttt{SLTU} używają surowych bitów bez znaku.
\begin{figure}[H]
  \centering
  \includegraphics[width=0.9\linewidth]{\detokenize{../assets/alu-path.png}}
  \caption{Od enkodera przez dekoder i ALU do kontrolowanego writeback.}
  \label{fig:alu-path}
\end{figure}
\ESCSectionBlockEnd

\ESCSectionBlockStart
\section{Task02 · Verilog assembler}
\reversemarginpar
\marginnote[%
  \begin{minipage}{\marginparwidth}%
  \raggedright
  {\fontsize{3.55}{3.95}\selectfont\ttfamily
    \begin{minipage}[t]{\marginparwidth}%
    \raggedright
    {\bfseries\textcolor{black!65}{TECH}\par}%
    \vspace{0.08em}%
    \hspace*{0.00em}\textcolor{red}{WE~01}\textcolor{black!48}{}\par%
    \end{minipage}%
  }%
  \end{minipage}%
]{}[-3.1em]
\normalmarginpar

\marginnote{%
  \begin{minipage}{\marginparwidth}%
  \raggedright
  {\fontsize{3.55}{3.95}\selectfont\ttfamily
  \hspace*{0.06cm}%
    \begin{minipage}[t]{\dimexpr\marginparwidth-0.06cm\relax}%
    \raggedright
    {\bfseries\textcolor{black!65}{OG}\par}%
    \vspace{0.08em}%
    \hspace*{0.00em}\textcolor{red}{WE~01}\textcolor{black!48}{}\par%
    \end{minipage}%
  }%
  \end{minipage}%
}[-3.1em]


\begingroup
\scriptsize\ttfamily\color{black!60}\sloppy
\noindent drzewka: \pdftooltip[width=\textwidth]{D1}{RV05.WE01.OG.IP.01 | WE 01: ALU i writeback. Zbudowanie mierzalnego etapu wykonania RV32I. |\textCR EN IP WO RV05.01: Uczeń analizuje wynik bitowy. | KW IP WS RV05.01: Signed, unsigned i\textCR przesunięcia mają poprawne wyniki.} \pdftooltip[width=\textwidth]{D2}{RV05.WE01.TECH.I4.01 | WE 01: ALU i writeback. Zbudowanie mierzalnego etapu wykonania RV32I.\textCR | EK INF04 RV05.01: Uczeń tworzy etap execute. | KW INF04 RV05.01: Program kończy się x3=12\textCR i x4=7.}\par
\vspace{0.10em}%
\noindent K1: Złóż ADD i ADDI przed porównaniem z testbenchem.\quad D1 D2\par
\par\vspace{0.18em}%
\endgroup

Złóż pola w kolejności określonej formatem. Ujemne immediate przechowuje 12 młodszych bitów reprezentacji uzupełnieniowej.
\ESCSectionBlockEnd

\ESCSectionBlockStart
\section{Task03 · Execute}
\reversemarginpar
\marginnote[%
  \begin{minipage}{\marginparwidth}%
  \raggedright
  {\fontsize{3.55}{3.95}\selectfont\ttfamily
    \begin{minipage}[t]{\marginparwidth}%
    \raggedright
    {\bfseries\textcolor{black!65}{TECH}\par}%
    \vspace{0.08em}%
    \hspace*{0.00em}\textcolor{red}{WE~01}\textcolor{black!48}{}\par%
    \end{minipage}%
  }%
  \end{minipage}%
]{}[-3.1em]
\normalmarginpar

\marginnote{%
  \begin{minipage}{\marginparwidth}%
  \raggedright
  {\fontsize{3.55}{3.95}\selectfont\ttfamily
  \hspace*{0.06cm}%
    \begin{minipage}[t]{\dimexpr\marginparwidth-0.06cm\relax}%
    \raggedright
    {\bfseries\textcolor{black!65}{OG}\par}%
    \vspace{0.08em}%
    \hspace*{0.00em}\textcolor{red}{WE~01}\textcolor{black!48}{}\par%
    \end{minipage}%
  }%
  \end{minipage}%
}[-3.1em]


\begingroup
\scriptsize\ttfamily\color{black!60}\sloppy
\noindent drzewka: \pdftooltip[width=\textwidth]{D1}{RV05.WE01.OG.IP.01 | WE 01: ALU i writeback. Zbudowanie mierzalnego etapu wykonania RV32I. |\textCR EN IP WO RV05.01: Uczeń analizuje wynik bitowy. | KW IP WS RV05.01: Signed, unsigned i\textCR przesunięcia mają poprawne wyniki.} \pdftooltip[width=\textwidth]{D2}{RV05.WE01.TECH.I4.01 | WE 01: ALU i writeback. Zbudowanie mierzalnego etapu wykonania RV32I.\textCR | EK INF04 RV05.01: Uczeń tworzy etap execute. | KW INF04 RV05.01: Program kończy się x3=12\textCR i x4=7.}\par
\vspace{0.10em}%
\noindent K1: Zmierz x1=7, x2=5, x3=12 i x4=7.\quad D1 D2\par
\par\vspace{0.18em}%
\endgroup

Wykonaj ADDI, ADDI, ADD i SUB. Każdy writeback staje się operandem następnej zależnej instrukcji; illegal blokuje zapis.
\ESCSectionBlockEnd

\end{document}