user
34 lines
1.3 KiB
Python
Executable File
34 lines
1.3 KiB
Python
Executable File
#!/usr/bin/env python3
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import sys
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def u32(value: int) -> int: return value & 0xFFFFFFFF
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def s32(value: int) -> int: value &= 0xFFFFFFFF; return value - 0x100000000 if value & 0x80000000 else value
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def task01() -> None:
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a, b = 0x80000000, 1
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results = [u32(7 + 5), u32(7 - 5), 0xA5 & 0x3C, 0xA5 | 0x3C, 0xA5 ^ 0x3C,
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u32(1 << 4), 0x80000000 >> 4, u32(s32(0x80000000) >> 4), int(s32(a) < s32(b)), int(a < b)]
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assert results == [12, 2, 0x24, 0xBD, 0x99, 16, 0x08000000, 0xF8000000, 1, 0]
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print("PASS task01 ops=10 signed_lt=1 unsigned_lt=0 sra=f8000000")
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def task02() -> None:
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add = (2 << 20) | (1 << 15) | (3 << 7) | 0x33
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addi = (0xFFC << 20) | (6 << 15) | (5 << 7) | 0x13
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assert (add, addi) == (0x002081B3, 0xFFC30293)
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print("PASS task02 add=002081b3 addi_neg4=ffc30293")
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def task03() -> None:
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regs = [0] * 32
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regs[1] = 7; regs[2] = 5; regs[3] = regs[1] + regs[2]; regs[4] = regs[3] - regs[2]
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assert regs[1:5] == [7, 5, 12, 7]
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print("PASS task03 instructions=4 x1=7 x2=5 x3=12 x4=7")
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TASKS = {"task01_alu_core": task01, "task02_verilog_assembler": task02, "task03_execute_stage": task03}
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if len(sys.argv) != 2 or sys.argv[1] not in TASKS: raise SystemExit(f"usage: {sys.argv[0]} {'|'.join(TASKS)}")
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TASKS[sys.argv[1]]()
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