module tb;
    logic clk = 0;
    logic rst = 1;
    logic enable;
    logic [1:0] count;
    integer pulses = 0;
    integer consecutive = 0;
    logic previous = 0;
    string trace_file;

    clock_enable dut (.*);
    always #1 clk = ~clk;

    initial begin
        if ($value$plusargs("trace=%s", trace_file)) begin
            $dumpfile(trace_file);
            $dumpvars(0, tb);
        end
        repeat (2) @(posedge clk);
        @(negedge clk);
        rst = 0;
        repeat (16) begin
            @(posedge clk); #1;
            if (enable) pulses += 1;
            if (enable && previous) consecutive += 1;
            previous = enable;
        end
        if (pulses != 4 || consecutive != 0 || count != 0)
            $fatal(1, "FAIL task01 pulses=%0d consecutive=%0d count=%0d", pulses, consecutive, count);
        $display("PASS task01 pulses=4 consecutive=0 final_count=0");
        $finish;
    end
endmodule