18 lines
679 B
Systemverilog
18 lines
679 B
Systemverilog
module tb;
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logic [31:0] instr;
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logic [6:0] opcode, funct7;
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logic [4:0] rd, rs1, rs2;
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logic [2:0] funct3;
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logic signed [31:0] imm_i;
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string trace_file;
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instruction_fields dut (.*);
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initial begin
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if ($value$plusargs("trace=%s", trace_file)) begin $dumpfile(trace_file); $dumpvars(0, tb); end
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instr = 32'hffc30293; #1;
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if (opcode != 7'h13 || rd != 5 || rs1 != 6 || funct3 != 0 || $signed(imm_i) != -4)
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$fatal(1, "FAIL task01 opcode=%h rd=%0d rs1=%0d imm=%0d", opcode, rd, rs1, $signed(imm_i));
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$display("PASS task01 instr=ffc30293 opcode=13 rd=5 rs1=6 funct3=0 imm=-4");
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$finish;
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end
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endmodule
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