feat(L01): add number systems and storage card

tests/reference_model.py

@@ -0,0 +1,36 @@
+#!/usr/bin/env python3
+"""Independent reference models for L01; no RTL source is imported."""
+import sys
+
+
+def task01():
+    value = 173
+    bits = format(value, "08b")
+    weighted = sum(((value >> bit) & 1) << bit for bit in range(8))
+    assert bits == "10101101" and format(value, "02X") == "AD" and weighted == value
+    print("PASS task01 value=173 binary=10101101 hex=AD weighted=173")
+
+
+def task02():
+    value = 0x80
+    signed = value - 0x100 if value & 0x80 else value
+    zext = value
+    sext = signed
+    lsr1 = value >> 1
+    asr1 = signed >> 1
+    assert (zext, sext, lsr1, asr1) == (128, -128, 64, -64)
+    print("PASS task02 input=0x80 zext=128 sext=-128 lsr1=64 asr1=-64")
+
+
+def task03():
+    word = 0x12345678
+    memory = [(word >> (8 * index)) & 0xFF for index in range(4)]
+    roundtrip = sum(byte << (8 * index) for index, byte in enumerate(memory))
+    assert memory == [0x78, 0x56, 0x34, 0x12] and roundtrip == word
+    print("PASS task03 word=0x12345678 bytes=78,56,34,12 endian=little roundtrip=1")
+
+
+TASKS = {"task01_positional_encoding": task01, "task02_extension_shifts": task02, "task03_little_endian_memory": task03}
+if len(sys.argv) != 2 or sys.argv[1] not in TASKS:
+    raise SystemExit(f"usage: {sys.argv[0]} {'|'.join(TASKS)}")
+TASKS[sys.argv[1]]()