module tb;
  logic [7:0] value; logic [2:0] shift; logic [31:0] zero_extended, sign_extended, logical_right, arithmetic_right; string trace_file;
  extension_shifts dut(.*);
  initial begin
    if ($value$plusargs("trace=%s", trace_file)) begin $dumpfile(trace_file); $dumpvars(0, tb); end
    value = 8'h80; shift = 3'd1; #1;
    if (zero_extended !== 32'd128 || $signed(sign_extended) !== -128 || logical_right !== 32'd64 || $signed(arithmetic_right) !== -64) $fatal(1, "extension/shift mismatch");
    $display("PASS task02 input=0x80 zext=128 sext=-128 lsr1=64 asr1=-64"); $finish;
  end
endmodule