user
17 lines
712 B
Systemverilog
17 lines
712 B
Systemverilog
module tb;
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logic [31:0] pc, rs1, target, link;
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logic signed [31:0] immediate;
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logic jalr;
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string trace_file;
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link_address dut (.*);
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initial begin
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if ($value$plusargs("trace=%s", trace_file)) begin $dumpfile(trace_file); $dumpvars(0, tb); end
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pc=32'h100; rs1=0; immediate=24; jalr=0; #1;
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if (target !== 32'h118 || link !== 32'h104) $fatal(1, "FAIL jal target=%h link=%h", target, link);
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rs1=32'h205; immediate=-4; jalr=1; #1;
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if (target !== 32'h200 || link !== 32'h104) $fatal(1, "FAIL jalr target=%h link=%h", target, link);
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$display("PASS task01 jal_target=00000118 link=00000104 jalr_target=00000200");
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$finish;
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end
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endmodule
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