{ "schema": "esc-card-react-view.v1", "card": { "id": "mpabi-inf-c-10-traps-interrupt-control", "series": "c", "series_title": "C · Freestanding RV32I and K&R", "number": "10", "count": "13", "slug": "traps-interrupt-control", "title": "Pułapki i sterowanie przerwaniami RV32I", "topic": "ecall, mepc, mcause, machine software IRQ oraz bramki mie/mstatus", "project": "Freestanding C na RV32I", "subject": "Informatyka", "level": "Rok 1 · C10 · RV32I/Hazard3", "revision_date": "2026-07-20T00:00:00+02:00", "status": "Gotowa", "version": "v00.01", "uuid": "ec04ecee-1c4d-529a-a4e2-d3f9b40700ec", "author": "M. Pabiszczak", "year": "2026" }, "library": { "schema": "stem-card-library.v2", "workspace": "edu", "subjects": [ { "id": "inf", "title": "INF · Informatyka", "current": true, "levels": [ { "id": "year-1", "title": "Rok 1", "current": true, "series": [ { "id": "console-bash", "title": "Bash · Console Tools", "current": false, "catalog_only": true, "role": "", "status": "", "cards": [ { "id": "L01", "title": "BusyBox — the Swiss Army Knife", "repo": "lab-console-busybox", "href": "", "available": false, "current": false, "number": "01", "version": "", "status": "planned", "tasks": [] }, { "id": "L02", "title": "Tmux — sessions, windows and panes", "repo": "lab-console-tmux", "href": "", "available": false, "current": false, "number": "02", "version": "", "status": "planned", "tasks": [] }, { "id": "L03", "title": "Neovim — navigation and editing", "repo": "lab-console-neovim", "href": "", "available": false, "current": false, "number": "03", "version": "", "status": "planned", "tasks": [] }, { "id": "L04", "title": "Git Basics I — status, add and commit", "repo": "lab-console-git-basics-1", "href": "", "available": false, "current": false, "number": "04", "version": "", "status": "planned", "tasks": [] }, { "id": "L05", "title": "Git Basics II — log, diff and restore", "repo": "lab-console-git-basics-2", "href": "", "available": false, "current": false, "number": "05", "version": "", "status": "planned", "tasks": [] }, { "id": "L06", "title": "Git Branching I — branch, switch and merge", "repo": "lab-console-git-branching-1", "href": "", "available": false, "current": false, "number": "06", "version": "", "status": "planned", "tasks": [] }, { "id": "L07", "title": "Git Branching II — rebase and conflicts", "repo": "lab-console-git-branching-2", "href": "", "available": false, "current": false, "number": "07", "version": "", "status": "planned", "tasks": [] }, { "id": "L08", "title": "Docker Fundamentals", "repo": "lab-console-docker", "href": "", "available": false, "current": false, "number": "08", "version": "", "status": "planned", "tasks": [] } ] }, { "id": "rv32i-asm", "title": "ASM · RV32I From Blinker to RISC-V", "current": false, "catalog_only": true, "role": "", "status": "", "cards": [ { "id": "L01", "title": "Number Systems and Storage", "repo": "lab-rv32i-asm-number-systems", "href": "", "available": false, "current": false, "number": "01", "version": "", "status": "planned", "tasks": [] }, { "id": "L02", "title": "FPGA Bring-up and Programming", "repo": "lab-rv32i-asm-fpga-bringup", "href": "", "available": false, "current": false, "number": "02", "version": "", "status": "planned", "tasks": [] }, { "id": "L03", "title": "Blinker and Synchronous Logic", "repo": "lab-rv32i-asm-blinker", "href": "", "available": false, "current": false, "number": "03", "version": "", "status": "planned", "tasks": [] }, { "id": "L04", "title": "The RISC-V ISA and Instruction Decoder", "repo": "lab-rv32i-asm-decoder", "href": "", "available": false, "current": false, "number": "04", "version": "", "status": "planned", "tasks": [] }, { "id": "L05", "title": "ALU and the Verilog Assembler", "repo": "lab-rv32i-asm-alu", "href": "", "available": false, "current": false, "number": "05", "version": "", "status": "planned", "tasks": [] }, { "id": "L06", "title": "Control Flow — Jumps and Branches", "repo": "lab-rv32i-asm-control-flow", "href": "", "available": false, "current": false, "number": "06", "version": "", "status": "planned", "tasks": [] }, { "id": "L07", "title": "Addresses and Memory", "repo": "lab-rv32i-asm-addresses-memory", "href": "", "available": false, "current": false, "number": "07", "version": "", "status": "planned", "tasks": [] }, { "id": "L08", "title": "Subroutines and the RISC-V ABI", "repo": "lab-rv32i-asm-subroutines-abi", "href": "", "available": false, "current": false, "number": "08", "version": "", "status": "planned", "tasks": [] }, { "id": "L09", "title": "Load and Store", "repo": "lab-rv32i-asm-load-store", "href": "", "available": false, "current": false, "number": "09", "version": "", "status": "planned", "tasks": [] } ] }, { "id": "c", "title": "C · Freestanding RV32I and K&R", "current": true, "catalog_only": true, "role": "", "status": "", "cards": [ { "id": "C01", "title": "ASM, C and GCC", "repo": "lab-rv32i-strlen-asm-c-gcc", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/852fa3c7-8329-583a-a244-b639d2e04495", "available": true, "current": false, "number": "01", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Ręczna implementacja RV32I ASM" }, { "id": "task02", "title": "Referencyjna implementacja w C" }, { "id": "task03", "title": "ASM wyemitowany przez GCC" } ] }, { "id": "C02", "title": ".bss, .data and static storage", "repo": "lab-rv32i-strlen-bss-data-stack", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/74afa921-fb51-5017-bcdb-f6e84fb444d8", "available": true, "current": false, "number": "02", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Wynik strlen w .bss" }, { "id": "task02", "title": "Wynik i napis w .data" }, { "id": "task03", "title": "Nieużyta tablica lokalna" }, { "id": "task04", "title": "Użyta tablica lokalna i stack frame" } ] }, { "id": "C03", "title": "ABI and Stack Frame", "repo": "lab-rv32i-strlen-abi-stack", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/72b22a0a-3297-5d75-a6ff-d1af48132d6c", "available": true, "current": false, "number": "03", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Argument i wynik bez powrotu z main" }, { "id": "task02", "title": "Pełny stack frame i zachowanie ra" } ] }, { "id": "C04", "title": "Types, Operators and Expressions", "repo": "lab-rv32i-c-types-operators-expressions", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/7818aa68-4983-5aca-bf7f-541cfce5c601", "available": true, "current": false, "number": "04", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Nazwy i stałe symboliczne" }, { "id": "task02", "title": "Typy i zakresy" }, { "id": "task03", "title": "Stałe, długość i enum" }, { "id": "task04", "title": "Deklaracje, inicjalizacja i const" }, { "id": "task05", "title": "Arytmetyka i rok przestępny" }, { "id": "task06", "title": "Porównania i logika" }, { "id": "task07", "title": "Konwersje: atoi, lower i htoi" }, { "id": "task08", "title": "Inkrementacja i operacje na napisach" }, { "id": "task09", "title": "Operatory bitowe" }, { "id": "task10", "title": "Przypisania i bitcount" }, { "id": "task11", "title": "Operator warunkowy" }, { "id": "task12", "title": "Priorytet i kolejność obliczeń" } ] }, { "id": "C05", "title": "Control Flow", "repo": "lab-rv32i-c-control-flow", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/7512361d-e5e6-5c08-ab18-8be29dacdc10", "available": true, "current": false, "number": "05", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Instrukcje i bloki" }, { "id": "task02", "title": "if-else i dangling else" }, { "id": "task03", "title": "else-if i wyszukiwanie binarne" }, { "id": "task04", "title": "switch: escape i unescape" }, { "id": "task05", "title": "while, for i Shell sort" }, { "id": "task06", "title": "do-while i itoa" }, { "id": "task07", "title": "break i continue" }, { "id": "task08", "title": "goto i etykiety" } ] }, { "id": "C06", "title": "Functions and Program Structure", "repo": "lab-rv32i-c-functions-program-structure", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/9667818d-b691-501d-817c-b58be4cbd594", "available": true, "current": false, "number": "06", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Funkcje i strindex" }, { "id": "task02", "title": "double i atof z wykładnikiem" }, { "id": "task03", "title": "Zewnętrzny stos RPN" }, { "id": "task04", "title": "Scope i extern" }, { "id": "task05", "title": "Nagłówki i prototypy" }, { "id": "task06", "title": "Static storage" }, { "id": "task07", "title": "Zmienne register" }, { "id": "task08", "title": "Struktura blokowa" }, { "id": "task09", "title": "Inicjalizacja" }, { "id": "task10", "title": "Rekurencja i quicksort" }, { "id": "task11", "title": "Preprocesor i makra" } ] }, { "id": "C07", "title": "Pointers, Arrays and Linear Allocator", "repo": "lab-rv32i-c-pointers-arrays", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/98dbe323-c624-53d6-9fe2-4ee688c44b38", "available": true, "current": false, "number": "07", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "task01" }, { "id": "task02", "title": "task02" }, { "id": "task03", "title": "task03" }, { "id": "task04", "title": "K&R 5.4 -- Linear Memory Allocator" }, { "id": "task05", "title": "task05" }, { "id": "task06", "title": "task06" }, { "id": "task07", "title": "task07" }, { "id": "task08", "title": "task08" }, { "id": "task09", "title": "task09" }, { "id": "task10", "title": "task10" }, { "id": "task11", "title": "task11" }, { "id": "task12", "title": "task12" } ] }, { "id": "C08", "title": "Structures and Linked State", "repo": "lab-rv32i-c-structures", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/f60fbba3-a788-5f1e-bc24-52af82f227c9", "available": true, "current": false, "number": "08", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Układ BlockHeader" }, { "id": "task02", "title": "Nagłówek, payload i odzyskanie właściciela" }, { "id": "task03", "title": "Intruzywna lista wolnych bloków" }, { "id": "task04", "title": "Wyrównana arena dwóch bloków" } ] }, { "id": "C09", "title": "smalloc, sbrk and minimal libc", "repo": "lab-rv32i-c-smalloc-sbrk-libc", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/8e4f8bee-41f0-523b-8ea2-8926bd3d7ab0", "available": true, "current": false, "number": "09", "version": "v00.01", "status": "planned", "tasks": [ { "id": "task01", "title": "strlen z libc bez sterty" }, { "id": "task02", "title": "Kontrolowany brak dostawcy sbrk" }, { "id": "task03", "title": "Bounded sbrk i atomowy błąd" }, { "id": "task04", "title": "Wyrównany smalloc append-only" }, { "id": "task05", "title": "malloc/free picolibc jako czarna skrzynka" } ] }, { "id": "C10", "title": "RV32I Traps and Interrupt Control", "repo": "lab-rv32i-c-interrupts", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/8fb9c110-557b-5081-8ae2-a56800f872e8", "available": true, "current": true, "number": "10", "version": "v00.01", "status": "planned", "tasks": [ { "id": "task01", "title": "ECALL i wznowienie pod mepc+4" }, { "id": "task02", "title": "Machine software IRQ i clear źródła" }, { "id": "task03", "title": "Macierz pending, MSIE i MIE" } ] }, { "id": "C11", "title": "Machine Timer and Periodic Work", "repo": "lab-rv32i-c-timer", "href": "", "available": false, "current": false, "number": "11", "version": "", "status": "planned", "tasks": [] }, { "id": "C12", "title": "UART — polling and interrupts", "repo": "lab-rv32i-c-uart", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/64f7c516-78b1-58ee-8619-a82d7061079f", "available": true, "current": false, "number": "12", "version": "v00.01", "status": "planned", "tasks": [ { "id": "task01", "title": "Polling jednego bajtu" }, { "id": "task02", "title": "Odbiór R przez external IRQ 16" }, { "id": "task03", "title": "Jednokomórkowa skrzynka drop-newest" } ] }, { "id": "C13", "title": "GPIO, Edges and Debounce", "repo": "lab-rv32i-c-gpio", "href": "", "available": false, "current": false, "number": "13", "version": "", "status": "planned", "tasks": [] } ] } ] }, { "id": "year-2", "title": "Rok 2", "current": false, "series": [ { "id": "cpp", "title": "C++", "current": false, "catalog_only": true, "role": "", "status": "", "cards": [ { "id": "CPP01", "title": "Translation Units, Linkage and Namespaces", "repo": "lab-cpp-build-namespaces", "href": "", "available": false, "current": false, "number": "01", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP02", "title": "Classes, Encapsulation and Invariants", "repo": "lab-cpp-classes-invariants", "href": "", "available": false, "current": false, "number": "02", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP03", "title": "Construction, Destruction and RAII", "repo": "lab-cpp-lifetime-raii", "href": "", "available": false, "current": false, "number": "03", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP04", "title": "References, const and Value Categories", "repo": "lab-cpp-references-const", "href": "", "available": false, "current": false, "number": "04", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP05", "title": "Copy, Move and the Rule of Zero/Five", "repo": "lab-cpp-copy-move", "href": "", "available": false, "current": false, "number": "05", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP06", "title": "Ownership and Resource Types", "repo": "lab-cpp-ownership", "href": "", "available": false, "current": false, "number": "06", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP07", "title": "Function and Class Templates", "repo": "lab-cpp-templates", "href": "", "available": false, "current": false, "number": "07", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP08", "title": "Static Polymorphism and CRTP", "repo": "lab-cpp-static-polymorphism", "href": "", "available": false, "current": false, "number": "08", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP09", "title": "Inheritance, Interfaces and Dynamic Dispatch", "repo": "lab-cpp-dynamic-polymorphism", "href": "", "available": false, "current": false, "number": "09", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP10", "title": "Operator Overloading and Strong Types", "repo": "lab-cpp-strong-types", "href": "", "available": false, "current": false, "number": "10", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP11", "title": "Containers, Iterators and Algorithms", "repo": "lab-cpp-containers-iterators", "href": "", "available": false, "current": false, "number": "11", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP12", "title": "Lambdas, Function Objects and Callables", "repo": "lab-cpp-lambdas-callables", "href": "", "available": false, "current": false, "number": "12", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP13", "title": "Error Models with and without Exceptions", "repo": "lab-cpp-error-models", "href": "", "available": false, "current": false, "number": "13", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP14", "title": "Object Layout, ABI and Binary Evidence", "repo": "lab-cpp-abi-evidence", "href": "", "available": false, "current": false, "number": "14", "version": "", "status": "planned", "tasks": [] }, { "id": "CPP15", "title": "Resource-type Integration Project", "repo": "lab-cpp-resource-integration", "href": "", "available": false, "current": false, "number": "15", "version": "", "status": "planned", "tasks": [] } ] }, { "id": "freertos-c", "title": "FreeRTOS C", "current": false, "catalog_only": true, "role": "", "status": "", "cards": [ { "id": "FC01", "title": "heap_4: From Linear Cursor to Reusable Blocks", "repo": "lab-rv32i-freertos-heap4", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/aea09ab7-9bfd-5368-8d1b-c8724871c1a7", "available": true, "current": false, "number": "01", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Predict and prove reusable heap_4 blocks" } ] }, { "id": "FC02", "title": "First Task, TCB and Task Stack", "repo": "lab-rv32i-freertos-c-first-task", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/a2538a1a-3c37-4c14-a6ea-db5aba8fd038", "available": true, "current": false, "number": "02", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Pierwszy task FreeRTOS — callback, context, TCB i stos" } ] }, { "id": "FC03", "title": "Tick, Scheduler, Priorities and Time Slicing", "repo": "lab-rv32i-freertos-c-scheduler", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/2214a13f-34c6-40a1-a561-70a00ec98285", "available": true, "current": false, "number": "03", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Kontrolowany eksperyment schedulera FreeRTOS" } ] }, { "id": "FC04", "title": "Delay, Blocking and Task States", "repo": "lab-rv32i-freertos-c-delay-state", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/4a7ef04c-ab08-5783-9192-5b02a90f05f8", "available": true, "current": false, "number": "04", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Delay, blokowanie, zawieszenie i self-delete" } ] }, { "id": "FC05", "title": "Queues and Byte-copy Semantics", "repo": "lab-rv32i-freertos-c-queue", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/8ee8f36a-471b-51bc-97b8-e204bd541c61", "available": true, "current": false, "number": "05", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Kolejka długości 1: empty, full, copy i FIFO" } ] }, { "id": "FC06", "title": "Software Timers and the Daemon Task", "repo": "lab-rv32i-freertos-c-software-timers", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/ab188300-f03d-5ddb-8316-b9534876a5bc", "available": true, "current": false, "number": "06", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "One-shot, auto-reload i timer daemon" } ] }, { "id": "FC07", "title": "Interrupt-safe API and Semaphore Handoff", "repo": "lab-rv32i-freertos-c-isr-semaphore", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/a6da1075-8d1f-5615-b0e6-0fc33e59e1e3", "available": true, "current": false, "number": "07", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "External IRQ → FromISR semaphore → high-priority task" } ] }, { "id": "FC08", "title": "Critical Sections, Mutexes and Priority Inheritance", "repo": "lab-rv32i-freertos-c-resource-management", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/2392f81a-ed6c-510b-86b5-06c5e2f1c6aa", "available": true, "current": false, "number": "08", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Low/Medium/High: ownership i dziedziczenie priorytetu" } ] }, { "id": "FC09", "title": "Event Groups and Multi-event Synchronization", "repo": "lab-rv32i-freertos-c-event-groups", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/3f4c1b8b-d54b-58d5-b92d-87a7233cbd9f", "available": true, "current": false, "number": "09", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "ALL-ready i trzyosobowa bariera" } ] }, { "id": "FC10", "title": "Direct-to-task Notifications", "repo": "lab-rv32i-freertos-c-notifications", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/3b57334e-2c35-5207-a51d-9321906db078", "available": true, "current": false, "number": "10", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Count, overwrite i bit flags na jednym slocie" } ] }, { "id": "FC11", "title": "Static Allocation and Bounded Storage", "repo": "lab-rv32i-freertos-c-static-allocation", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/f4d7caf3-d665-5a2d-b9eb-39a120a64ff7", "available": true, "current": false, "number": "11", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Same behavior, two storage policies" } ] }, { "id": "FC12", "title": "Assertions, Hooks, Stack Checks and Runtime Diagnostics", "repo": "lab-rv32i-freertos-c-diagnostics", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/c3027314-85a4-5e4a-af13-0939c7467a62", "available": true, "current": false, "number": "12", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Diagnose before changing the program" } ] }, { "id": "FC13", "title": "UART Interrupt-to-task Pipeline", "repo": "lab-rv32i-freertos-c-uart", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/6a838fd1-ab1b-52b6-baaf-659120a4d60a", "available": true, "current": false, "number": "13", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Build and prove a bounded UART RX pipeline" } ] }, { "id": "FC14", "title": "GPIO, Hardware Timer and Deferred Work", "repo": "lab-rv32i-freertos-c-gpio-timer", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/0cc561df-bf81-5bba-9df1-c872d5b42eb8", "available": true, "current": false, "number": "14", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Prove one machine-timer event from ISR to daemon GPIO work" } ] }, { "id": "FC15", "title": "Integrated Deterministic FreeRTOS C Application", "repo": "lab-rv32i-freertos-c-integration", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/fe92efeb-3c38-5975-86d8-ed630e1ad3bb", "available": true, "current": false, "number": "15", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Prove one complete FreeRTOS C architecture" } ] } ] }, { "id": "freertos-cpp", "title": "FreeRTOS C++", "current": false, "catalog_only": true, "role": "", "status": "", "cards": [ { "id": "K02", "title": "C++ Task Wrapper, CRTP and Lifecycle", "repo": "lab-rv32i-freertos-task-stack-vector", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/948ce9fd-3d0c-5721-a0ae-ef422008fec8", "available": true, "current": false, "number": "02", "version": "v00.04", "status": "existing", "tasks": [ { "id": "task01", "title": "C++ Task wrapper — OOP i debugowanie cyklu życia" } ] }, { "id": "K03", "title": "Vector V1 — Destructor, Move, Ownership and RAII", "repo": "lab-rv32i-freertos-vector-raii", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/de1a2818-4c30-5760-8b31-255114f82e90", "available": true, "current": false, "number": "03", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Vector V1 — transfer własności i powrót heapu" } ] }, { "id": "K04", "title": "Scheduler States, Priorities and Typed Ticks", "repo": "lab-rv32i-freertos-scheduler-states", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/853a7dd7-b00b-4f4a-96e8-c160fc5bb04a", "available": true, "current": false, "number": "04", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Osiem snapshotów decyzji schedulera" } ] }, { "id": "K05", "title": "C++ Heap Bridge, Heap Models and HeapStats", "repo": "lab-rv32i-freertos-heap-models", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/c456b505-dc5c-4894-b832-bb4c5afd0feb", "available": true, "current": false, "number": "05", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Fragmentacja, koalescencja i historyczny watermark" } ] }, { "id": "K06", "title": "MemoryResource and FreeRtosAllocator", "repo": "lab-rv32i-freertos-allocator-resource", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/1af48a2e-8564-4e18-8115-b2c0208169d6", "available": true, "current": false, "number": "06", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Dwa zasoby, jeden typed allocator" } ] }, { "id": "K07", "title": "TaskHandle_t, Explicit Start and Static Trampoline", "repo": "lab-rv32i-freertos-task-wrapper", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/9bffead0-4341-4350-806d-e975b1a3a08f", "available": true, "current": false, "number": "07", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Stabilny obiekt przez statyczny trampoline" } ] }, { "id": "K08", "title": "DynamicTask, StaticTask, Deletion and Lifetime", "repo": "lab-rv32i-freertos-static-task", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/d9e45417-a37f-487c-813f-fc7a44d4b4f3", "available": true, "current": false, "number": "08", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Dwie polityki storage i pełna oś delete" } ] }, { "id": "K09", "title": "Scheduler Facade and Scoped Kernel Guards", "repo": "lab-rv32i-freertos-kernel-facade", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/6a2ab068-17e7-4bfa-b726-2df37787ed69", "available": true, "current": false, "number": "09", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Fasada kernela i restore na każdej ścieżce" } ] }, { "id": "K10", "title": "Queue and StaticQueue", "repo": "lab-rv32i-freertos-queue", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/66967c2d-bb34-4344-8064-f54d06cce47a", "available": true, "current": false, "number": "10", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Typed byte-copy queue z dwiema politykami storage" } ] }, { "id": "K11", "title": "Mutex, LockGuard and Priority Inheritance", "repo": "lab-rv32i-freertos-mutex", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/34d7ad61-6b03-4922-8e58-b8b98316e5f7", "available": true, "current": false, "number": "11", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "LockGuard i zmierzone priority inheritance" } ] }, { "id": "K12", "title": "Semaphores and Task Notifications", "repo": "lab-rv32i-freertos-semaphore-notify", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/fcb6107c-268f-4e86-a8cc-092e5875f6f0", "available": true, "current": false, "number": "12", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Semaphore slots i jednoodbiorcza notification" } ] }, { "id": "K13", "title": "EventGroup and Coordinated State", "repo": "lab-rv32i-freertos-event-group", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/5fbcd7c6-3a73-4cd2-b76c-bdb016d1daaa", "available": true, "current": false, "number": "13", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Typed EventGroup i trzy źródła stanu" } ] }, { "id": "K14", "title": "Software Timer and the Timer Daemon Task", "repo": "lab-rv32i-freertos-sw-timer", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/78db37df-63e5-4c5b-80ce-f73a411f0b50", "available": true, "current": false, "number": "14", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "Static one-shot i periodic timer na daemon tasku" } ] }, { "id": "K15", "title": "Explicit FromISR, UART and GPIO Wrappers", "repo": "lab-rv32i-freertos-isr-drivers", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/02f6cd71-5c85-4883-a237-1d4ba08d9469", "available": true, "current": false, "number": "15", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "UART queue i GPIO notify z realnego IRQ" } ] }, { "id": "K16", "title": "Integrated Real-time Application and Evidence", "repo": "lab-rv32i-freertos-integration", "href": "https://dce7fb9d-7b2f-5d49-96a2-3a30d3070b84.mpabi.pl/05b4f486-a27c-455d-a315-f4e51a4c66b3", "available": true, "current": false, "number": "16", "version": "v00.01", "status": "existing", "tasks": [ { "id": "task01", "title": "End-to-end RTOS service i evidence report" } ] } ] }, { "id": "posix-threads", "title": "POSIX Threads", "current": false, "catalog_only": true, "role": "", "status": "", "cards": [ { "id": "PT01", "title": "Process and Thread Execution Context", "repo": "lab-posix-process-thread", "href": "", "available": false, "current": false, "number": "01", "version": "", "status": "planned", "tasks": [] }, { "id": "PT02", "title": "pthread_create, pthread_join and Lifecycle", "repo": "lab-posix-pthread-create-join", "href": "", "available": false, "current": false, "number": "02", "version": "", "status": "planned", "tasks": [] }, { "id": "PT03", "title": "Arguments, Return Values and Ownership", "repo": "lab-posix-thread-arguments", "href": "", "available": false, "current": false, "number": "03", "version": "", "status": "planned", "tasks": [] }, { "id": "PT04", "title": "Data Races and the Happens-before Question", "repo": "lab-posix-data-races", "href": "", "available": false, "current": false, "number": "04", "version": "", "status": "planned", "tasks": [] }, { "id": "PT05", "title": "Mutex, Critical Section and Deadlock", "repo": "lab-posix-mutex", "href": "", "available": false, "current": false, "number": "05", "version": "", "status": "planned", "tasks": [] }, { "id": "PT06", "title": "Condition Variables and Predicates", "repo": "lab-posix-condition-variable", "href": "", "available": false, "current": false, "number": "06", "version": "", "status": "planned", "tasks": [] }, { "id": "PT07", "title": "Bounded Producer–Consumer Queue", "repo": "lab-posix-producer-consumer", "href": "", "available": false, "current": false, "number": "07", "version": "", "status": "planned", "tasks": [] }, { "id": "PT08", "title": "POSIX Semaphores", "repo": "lab-posix-semaphore", "href": "", "available": false, "current": false, "number": "08", "version": "", "status": "planned", "tasks": [] }, { "id": "PT09", "title": "Reader–Writer Lock", "repo": "lab-posix-rwlock", "href": "", "available": false, "current": false, "number": "09", "version": "", "status": "planned", "tasks": [] }, { "id": "PT10", "title": "C Atomics and Memory Ordering", "repo": "lab-posix-atomics", "href": "", "available": false, "current": false, "number": "10", "version": "", "status": "planned", "tasks": [] }, { "id": "PT11", "title": "Cancellation, Cleanup and Safe Shutdown", "repo": "lab-posix-cancellation-cleanup", "href": "", "available": false, "current": false, "number": "11", "version": "", "status": "planned", "tasks": [] }, { "id": "PT12", "title": "Thread-local Storage", "repo": "lab-posix-thread-local", "href": "", "available": false, "current": false, "number": "12", "version": "", "status": "planned", "tasks": [] }, { "id": "PT13", "title": "Scheduling Policy, Priority and Affinity", "repo": "lab-posix-scheduling", "href": "", "available": false, "current": false, "number": "13", "version": "", "status": "planned", "tasks": [] }, { "id": "PT14", "title": "GDB, Sanitizers and Race Evidence", "repo": "lab-posix-thread-debugging", "href": "", "available": false, "current": false, "number": "14", "version": "", "status": "planned", "tasks": [] }, { "id": "PT15", "title": "POSIX Threads vs FreeRTOS Integration", "repo": "lab-posix-freertos-comparison", "href": "", "available": false, "current": false, "number": "15", "version": "", "status": "planned", "tasks": [] } ] }, { "id": "oop", "title": "OOP and Design Patterns", "current": false, "catalog_only": true, "role": "reference", "status": "", "cards": [ { "id": "OOP01", "title": "Strategy — Replaceable Behaviour", "repo": "lab-cpp-oop-strategy", "href": "", "available": false, "current": false, "number": "01", "version": "", "status": "design", "tasks": [] }, { "id": "OOP02", "title": "Adapter — Stable Boundary", "repo": "lab-cpp-oop-adapter", "href": "", "available": false, "current": false, "number": "02", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP03", "title": "Template Method — Fixed Skeleton", "repo": "lab-cpp-oop-template-method", "href": "", "available": false, "current": false, "number": "03", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP04", "title": "Static vs Dynamic Dispatch", "repo": "lab-cpp-oop-dispatch", "href": "", "available": false, "current": false, "number": "04", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP05", "title": "RAII and Ownership", "repo": "lab-cpp-oop-raii", "href": "", "available": false, "current": false, "number": "05", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP06", "title": "State — Explicit Behaviour", "repo": "lab-cpp-oop-state", "href": "", "available": false, "current": false, "number": "06", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP07", "title": "Facade — Subsystem Boundary", "repo": "lab-cpp-oop-facade", "href": "", "available": false, "current": false, "number": "07", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP08", "title": "Command — Request as Object", "repo": "lab-cpp-oop-command", "href": "", "available": false, "current": false, "number": "08", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP09", "title": "Observer — Subscription and Telemetry", "repo": "lab-cpp-oop-observer", "href": "", "available": false, "current": false, "number": "09", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP10", "title": "Factory Method — Resource Policy", "repo": "lab-cpp-oop-factory-method", "href": "", "available": false, "current": false, "number": "10", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP11", "title": "Builder — Valid Configuration", "repo": "lab-cpp-oop-builder", "href": "", "available": false, "current": false, "number": "11", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP12", "title": "Decorator — Measurement and Diagnostics", "repo": "lab-cpp-oop-decorator", "href": "", "available": false, "current": false, "number": "12", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP13", "title": "Composite — Component Tree", "repo": "lab-cpp-oop-composite", "href": "", "available": false, "current": false, "number": "13", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP14", "title": "Chain of Responsibility", "repo": "lab-cpp-oop-chain", "href": "", "available": false, "current": false, "number": "14", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP15", "title": "Pattern-language Integration", "repo": "lab-cpp-oop-integration", "href": "", "available": false, "current": false, "number": "15", "version": "", "status": "planned", "tasks": [] } ] } ] }, { "id": "year-3", "title": "Rok 3 · plan", "current": false, "series": [ { "id": "modern-cpp-stl", "title": "Modern C++ / STL", "current": false, "catalog_only": true, "role": "", "status": "scope-reserved", "cards": [] }, { "id": "std-threads", "title": "std::thread / std::jthread", "current": false, "catalog_only": true, "role": "", "status": "scope-reserved", "cards": [] }, { "id": "boost-asio", "title": "Boost.Asio", "current": false, "catalog_only": true, "role": "", "status": "scope-reserved", "cards": [] }, { "id": "oop", "title": "OOP and Design Patterns", "current": false, "catalog_only": true, "role": "reference", "status": "", "cards": [ { "id": "OOP01", "title": "Strategy — Replaceable Behaviour", "repo": "lab-cpp-oop-strategy", "href": "", "available": false, "current": false, "number": "01", "version": "", "status": "design", "tasks": [] }, { "id": "OOP02", "title": "Adapter — Stable Boundary", "repo": "lab-cpp-oop-adapter", "href": "", "available": false, "current": false, "number": "02", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP03", "title": "Template Method — Fixed Skeleton", "repo": "lab-cpp-oop-template-method", "href": "", "available": false, "current": false, "number": "03", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP04", "title": "Static vs Dynamic Dispatch", "repo": "lab-cpp-oop-dispatch", "href": "", "available": false, "current": false, "number": "04", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP05", "title": "RAII and Ownership", "repo": "lab-cpp-oop-raii", "href": "", "available": false, "current": false, "number": "05", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP06", "title": "State — Explicit Behaviour", "repo": "lab-cpp-oop-state", "href": "", "available": false, "current": false, "number": "06", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP07", "title": "Facade — Subsystem Boundary", "repo": "lab-cpp-oop-facade", "href": "", "available": false, "current": false, "number": "07", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP08", "title": "Command — Request as Object", "repo": "lab-cpp-oop-command", "href": "", "available": false, "current": false, "number": "08", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP09", "title": "Observer — Subscription and Telemetry", "repo": "lab-cpp-oop-observer", "href": "", "available": false, "current": false, "number": "09", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP10", "title": "Factory Method — Resource Policy", "repo": "lab-cpp-oop-factory-method", "href": "", "available": false, "current": false, "number": "10", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP11", "title": "Builder — Valid Configuration", "repo": "lab-cpp-oop-builder", "href": "", "available": false, "current": false, "number": "11", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP12", "title": "Decorator — Measurement and Diagnostics", "repo": "lab-cpp-oop-decorator", "href": "", "available": false, "current": false, "number": "12", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP13", "title": "Composite — Component Tree", "repo": "lab-cpp-oop-composite", "href": "", "available": false, "current": false, "number": "13", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP14", "title": "Chain of Responsibility", "repo": "lab-cpp-oop-chain", "href": "", "available": false, "current": false, "number": "14", "version": "", "status": "planned", "tasks": [] }, { "id": "OOP15", "title": "Pattern-language Integration", "repo": "lab-cpp-oop-integration", "href": "", "available": false, "current": false, "number": "15", "version": "", "status": "planned", "tasks": [] } ] } ] }, { "id": "year-4", "title": "Rok 4 · plan", "current": false, "series": [ { "id": "transformers-gpu", "title": "Transformers on GPU", "current": false, "catalog_only": true, "role": "", "status": "scope-reserved", "cards": [] } ] } ] }, { "id": "fiz", "title": "FIZ · Fizyka", "current": false, "levels": [ { "id": "all", "title": "Katalog", "current": false, "series": [ { "id": "fiz", "title": "Fizyka", "current": false, "catalog_only": false, "role": "", "status": "", "cards": [ { "id": "ruch-1d", "title": "Ruch 1D", "repo": "ruch-1d", "href": "", "available": false, "current": false, "number": "", "version": "", "status": "", "tasks": [] }, { "id": "ruch-2d", "title": "Ruch 2D", "repo": "ruch-2d", "href": "", "available": false, "current": false, "number": "", "version": "", "status": "", "tasks": [] }, { "id": "ruch-po-okregu", "title": "Ruch po okręgu", "repo": "ruch-po-okregu", "href": "", "available": false, "current": false, "number": "", "version": "", "status": "", "tasks": [] } ] } ] } ] } ] }, "total_pages": 7, "front": { "header_html": "
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
TITLEPułapki i sterowanie przerwaniami RV32I
VER.v00.01
DATETIME2026-07-20T00:00:00+02:00
PROJECTFreestanding C na RV32I
SERIESC · Freestanding RV32I and K&R
CARD10/13
SHEET1/7
SUBJ.Inf.
PROG.
CORE
SCOPE
LEVEL
POS.
GITEA UUIDec04ecee-1c4d-529a-a4e2-d3f9b40700ecCARD UUID8fb9c110-557b-5081-8ae2-a56800f872e8AUTHOR  M. Pabiszczak
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
", "left_margin_html": "
TECH
", "right_margin_html": "
OG
", "goal_title": "Cel karty", "goal_html": "

Uczeń odróżnia synchroniczny wyjątek od asynchronicznego przerwania, wyprowadza adres wznowienia z mepc oraz dowodzi, że samo pending nie wystarcza bez indywidualnej i globalnej bramki enable.

", "scope_title": "Zakres i zachowane przykłady", "scope_html": "

Trzy obrazy RV32I działają na rzeczywistym modelu Hazard3. Task01 wykonuje ecall; Task02 używa kontrolowanego machine software interrupt; Task03 mierzy macierz pending, mie.MSIE i mstatus.MIE. Peryferia pojawiają się dopiero w C12 i C13. Układ każdego przykładu: pełny profil A1-A8; widok N/D ma jawny powód, a diagram nie jest wymagany, gdy tekst daje lepszy dowód.

", "scope_columns": [ "chapter", "task", "idea", "priority" ], "scope_headers": [ "Typ", "Task", "Idea", "Waga" ], "scope_rows": [ { "chapter": "ECALL", "task": "Task01", "idea_html": "

synchroniczny cause 11, mepc i mret

", "priority": "kluczowe", "status": "", "status_label": "", "version": "", "key": true }, { "chapter": "MSIP", "task": "Task02", "idea_html": "

MSIP, MSIE, MIE, vector 3 i mret

", "priority": "kluczowe", "status": "", "status_label": "", "version": "", "key": true }, { "chapter": "GATE", "task": "Task03", "idea_html": "

to samo źródło, dwie niezależne bramki

", "priority": "kluczowe", "status": "", "status_label": "", "version": "", "key": true } ] }, "sections": [ { "id": "section-1-content", "index": 1, "title": "1 — Wyjątek synchroniczny wskazuje instrukcję", "show_heading": true, "toc_entry": true, "header_html": "
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
TITLEPułapki i sterowanie przerwaniami RV32I
VER.v00.01
DATETIME2026-07-20T00:00:00+02:00
PROJECTFreestanding C na RV32I
SERIESC · Freestanding RV32I and K&R
CARD10/13
SHEET2/7
SUBJ.Inf.
PROG.
CORE
SCOPE
LEVEL
POS.
GITEA UUIDec04ecee-1c4d-529a-a4e2-d3f9b40700ecCARD UUID8fb9c110-557b-5081-8ae2-a56800f872e8AUTHOR  M. Pabiszczak
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
", "left_margin_html": "
TECH
", "right_margin_html": "
OG
", "content_html": "

ecall jest wykonywany przez bieżący strumień instrukcji, więc mcause=11 nie ma ustawionego bitu interrupt, a mepc wskazuje samo ecall. Handler Task01 świadomie zapisuje mepc+4; bez tego mret wykonałby ponownie tę samą instrukcję. Taka polityka jest poprawna dla tego kontrolowanego ECALL, ale nie wolno automatycznie pomijać instrukcji przy każdym błędzie.

", "tasks": [], "assets": [], "steps": [], "spread_group": "", "spread_label": "", "spread_columns": 1, "spread_index": 1, "spread_count": 1, "page_orientation": "portrait" }, { "id": "section-2-content", "index": 2, "title": "2 — Software IRQ jest asynchronicznym źródłem poziomowym", "show_heading": true, "toc_entry": true, "header_html": "
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
TITLEPułapki i sterowanie przerwaniami RV32I
VER.v00.01
DATETIME2026-07-20T00:00:00+02:00
PROJECTFreestanding C na RV32I
SERIESC · Freestanding RV32I and K&R
CARD10/13
SHEET3/7
SUBJ.Inf.
PROG.
CORE
SCOPE
LEVEL
POS.
GITEA UUIDec04ecee-1c4d-529a-a4e2-d3f9b40700ecCARD UUID8fb9c110-557b-5081-8ae2-a56800f872e8AUTHOR  M. Pabiszczak
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
", "left_margin_html": "
TECH
", "right_margin_html": "
OG
", "content_html": "

Testbench ustawia MSIP hart0, a rdzeń widzi mip.MSIP. Dostarczenie wymaga dodatkowo mie.MSIE=1 i mstatus.MIE=1. Wektor 3 prowadzi do isr_machine_softirq; handler odczytuje mcause=0x80000003, usuwa źródło i dopiero potem publikuje licznik. mret wraca do przerwanego kodu, a nie do instrukcji wybranej ręcznie przez aplikację.

", "tasks": [], "assets": [], "steps": [], "spread_group": "", "spread_label": "", "spread_columns": 1, "spread_index": 1, "spread_count": 1, "page_orientation": "portrait" }, { "id": "section-3-content", "index": 3, "title": "3 — Pending i enable odpowiadają na inne pytania", "show_heading": true, "toc_entry": true, "header_html": "
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
TITLEPułapki i sterowanie przerwaniami RV32I
VER.v00.01
DATETIME2026-07-20T00:00:00+02:00
PROJECTFreestanding C na RV32I
SERIESC · Freestanding RV32I and K&R
CARD10/13
SHEET4/7
SUBJ.Inf.
PROG.
CORE
SCOPE
LEVEL
POS.
GITEA UUIDec04ecee-1c4d-529a-a4e2-d3f9b40700ecCARD UUID8fb9c110-557b-5081-8ae2-a56800f872e8AUTHOR  M. Pabiszczak
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
", "left_margin_html": "
TECH
", "right_margin_html": "
OG
", "content_html": "

Pending mówi, że źródło żąda obsługi. mie.MSIE dopuszcza konkretną klasę, a mstatus.MIE otwiera globalną bramkę machine mode. Task03 utrzymuje to samo pending i kolejno sprawdza dwa stany z jedną zamkniętą bramką oraz stan z obiema otwartymi. Dzięki temu kod 0 dowodzi całej macierzy, a nie tylko tego, że ISR kiedyś się wykonał.

", "tasks": [], "assets": [], "steps": [], "spread_group": "", "spread_label": "", "spread_columns": 1, "spread_index": 1, "spread_count": 1, "page_orientation": "portrait" }, { "id": "section-4-task01", "index": 4, "title": "TASK01 — ECALL i wznowienie pod mepc+4", "show_heading": true, "toc_entry": true, "header_html": "
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
TITLEPułapki i sterowanie przerwaniami RV32I
VER.v00.01
DATETIME2026-07-20T00:00:00+02:00
PROJECTFreestanding C na RV32I
SERIESC · Freestanding RV32I and K&R
CARD10/13
SHEET5/7
SUBJ.Inf.
PROG.
CORE
SCOPE
LEVEL
POS.
GITEA UUIDec04ecee-1c4d-529a-a4e2-d3f9b40700ecCARD UUID8fb9c110-557b-5081-8ae2-a56800f872e8AUTHOR  M. Pabiszczak
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
", "left_margin_html": "
TECH
", "right_margin_html": "
OG
", "content_html": "", "tasks": [ { "ref": "task01", "title": "ECALL i wznowienie pod mepc+4", "uuid": "2cd1da12-b916-5def-b868-da4b13ff9089", "criterion": "Hazard3: count=1, mcause=0x0000000b, resume_pc-mepc=4, resumed=1, pass=1 i kod 0.", "conclusion_html": "", "prompt_html": "

Przed uruchomieniem przewidź bit interrupt i kod mcause, wskaż wartość mepc oraz adres wznowienia. Wyjaśnij, co stałoby się bez zapisu mepc+4.

", "flow": [ { "id": "task01.a1", "kind": "block", "title": "A1 CONTEXT · AKTYWNE — kontrolowany wyjątek M-mode", "content_html": "

Zachowany przykład: \\nolinkurl{src/tasks/task01_ecall_resume.c}. Granica zaczyna się na instrukcji ecall w main i kończy po powrocie do kolejnej instrukcji. Nie ma zewnętrznego peryferium ani pending IRQ; rdzeń sam tworzy synchroniczną pułapkę.

", "steps": [] }, { "id": "task01.a2", "kind": "block", "title": "A2 STRUCTURE · AKTYWNE — mcause, mepc i mtvec", "content_html": "

mcause zapisuje klasę 11 bez bitu interrupt, mepc zapisuje adres ECALL, a baza mtvec prowadzi wszystkie synchroniczne wyjątki do handle_exception. Handler publikuje oryginał i osobny adres wznowienia.

", "steps": [] }, { "id": "task01.a3", "kind": "block", "title": "A3 DISPATCH · AKTYWNE — synchroniczny slot mtvec", "content_html": "

Sprzęt wybiera bazowy slot wektora, ponieważ zdarzenie jest wyjątkiem, nie IRQ. handle_exception odczytuje mcause i obsługuje jedyny dopuszczony przypadek ECALL. To granica trap dispatch, choć nie ma tablicy callbacków.

", "steps": [] }, { "id": "task01.a4", "kind": "block", "title": "A4 APPLICATION · AKTYWNE — cause 11 i stały krok 4", "content_html": "

ECALL w RV32I jest instrukcją 32-bitową, dlatego dla tego przykładu poprawny resume ma wartość mepc+4. Gate wymaga jednego wejścia, cause 11, delty 4 i ustawienia resumed dopiero po mret.

", "steps": [] }, { "id": "task01.a5", "kind": "block", "title": "A5 FLOW · AKTYWNE — ecall, save, patch, mret", "content_html": "

Normalny kod wykonuje ECALL. Rdzeń zapisuje mepc/mcause, skacze do wektora, handler odczytuje oba CSR i zapisuje nowe mepc. Epilog interrupt("machine") kończy się mret; dopiero potem main zapisuje resumed.

", "steps": [] }, { "id": "task01.a6", "kind": "block", "title": "A6 STATE · AKTYWNE — RUNNING, TRAP, RESUMED", "content_html": "

Stan przechodzi RUNNING -> TRAP(mepc=ecall,cause=11) -> RESUMED(pc=mepc+4). Licznik 1 odróżnia pojedyncze wznowienie od pętli ponownego wykonywania ECALL.

", "steps": [] }, { "id": "task01.a7", "kind": "block", "title": "A7 RUNTIME · AKTYWNE — ecall i mret w ELF", "content_html": "

Oracle porównuje raportowane adresy i niezależnie wymaga różnicy 4. Objdump musi pokazać ecall w main oraz mret w handlerze. Segmenty LOAD pozostają rozdzielone R-X/R-W.

", "steps": [] }, { "id": "task01.a8", "kind": "block", "title": "A8 PATTERNS · AKTYWNE — explicit resume policy", "content_html": "

Wzorzec handlera wyjątku obejmuje jawną decyzję: retry, skip albo terminate. Task01 wybiera skip tylko dla znanego ECALL. Dla faultu pamięci bezwarunkowe mepc+4 mogłoby ukryć błąd i jest niedozwolone.

", "steps": [] }, { "id": "task01.proof", "kind": "exercise", "title": "Przewidywanie → wykonanie → wniosek", "content_html": "", "steps": [] }, { "id": "task01.worksheet", "kind": "block", "title": "TASK01 · Zapis dowodu ucznia", "content_html": "

1. Przewidywanie przed uruchomieniem \\noindent \\noindent 2. mcause, mepc i adres wznowienia \\noindent \\noindent 3. ecall/mret w listingu i kod wyjścia \\noindent \\noindent 4. Wniosek: reguła języka lub kontrakt targetu potwierdzony przez pomiar \\noindent \\noindent

", "steps": [] } ] } ], "assets": [], "steps": [], "spread_group": "", "spread_label": "", "spread_columns": 1, "spread_index": 1, "spread_count": 1, "page_orientation": "portrait" }, { "id": "section-5-task02", "index": 5, "title": "TASK02 — Machine software IRQ i clear źródła", "show_heading": true, "toc_entry": true, "header_html": "
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
TITLEPułapki i sterowanie przerwaniami RV32I
VER.v00.01
DATETIME2026-07-20T00:00:00+02:00
PROJECTFreestanding C na RV32I
SERIESC · Freestanding RV32I and K&R
CARD10/13
SHEET6/7
SUBJ.Inf.
PROG.
CORE
SCOPE
LEVEL
POS.
GITEA UUIDec04ecee-1c4d-529a-a4e2-d3f9b40700ecCARD UUID8fb9c110-557b-5081-8ae2-a56800f872e8AUTHOR  M. Pabiszczak
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
", "left_margin_html": "
TECH
", "right_margin_html": "
OG
", "content_html": "", "tasks": [ { "ref": "task02", "title": "Machine software IRQ i clear źródła", "uuid": "a4b503ba-cacc-5af1-9ecd-31f51563ca76", "criterion": "Hazard3: count=1, mcause=0x80000003, pending_before=1, pending_in_handler=1, pending_after=0, resumed=1, pass=1 i kod 0.", "conclusion_html": "", "prompt_html": "

Zapisz stan pending przed globalnym enable, mcause w ISR i pending po clear. Rozdziel źródło MSIP od obu bramek oraz wskaż, dlaczego handler musi usunąć źródło przed mret.

", "flow": [ { "id": "task02.a1", "kind": "block", "title": "A1 CONTEXT · AKTYWNE — kontrolowane źródło bez peryferium", "content_html": "

Zachowany przykład: \\nolinkurl{src/tasks/task02_machine_software_irq.c}. tb_set_softirq(0) podnosi machine software interrupt hart0. Testbench jest źródłem, CSR są kontrolą rdzenia, ISR usuwa żądanie, a main ocenia wznowienie. UART/GPIO nie uczestniczą.

", "steps": [] }, { "id": "task02.a2", "kind": "block", "title": "A2 STRUCTURE · AKTYWNE — trzy bity i jeden wektor", "content_html": "

Źródło jest widoczne jako mip.MSIP; indywidualna bramka to mie.MSIE, globalna to mstatus.MIE. Cause 3 w trybie vectored wybiera slot 3 i symbol isr_machine_softirq.

", "steps": [] }, { "id": "task02.a3", "kind": "block", "title": "A3 DISPATCH · AKTYWNE — sprzęt wybiera vector 3", "content_html": "

Bit interrupt w mcause i kod 3 powodują sprzętowy wybór slotu machine software IRQ. Nie jest to statyczne jal z main. Po wejściu symbol handlera jest już określony przez wektor, a mret odtwarza przerwany kontekst.

", "steps": [] }, { "id": "task02.a4", "kind": "block", "title": "A4 APPLICATION · AKTYWNE — pending 1 do 0", "content_html": "

Przy MSIE=1 i MIE=0 źródło jest już pending, lecz licznik wynosi 0. Po otwarciu MIE handler widzi 0x80000003 i pending=1, wykonuje clear, zwiększa licznik, a po mret main mierzy pending=0.

", "steps": [] }, { "id": "task02.a5", "kind": "block", "title": "A5 FLOW · AKTYWNE — configure, assert, observe, enable", "content_html": "

Kolejność eliminuje wyścig pomiaru: najpierw wyłącz wszystko, ustaw MSIE, podnieś źródło, zmierz pending, dopiero potem ustaw MIE. Handler odczytuje cause/pending przed clear i publikuje licznik po clear.

", "steps": [] }, { "id": "task02.a6", "kind": "block", "title": "A6 STATE · AKTYWNE — MASKED_PENDING, ACTIVE, CLEARED", "content_html": "

Źródło przechodzi do MASKED_PENDING, bo globalna bramka jest zamknięta. Po MIE staje się ACTIVE; clear w ISR tworzy CLEARED. Resumed=1 jest osobnym stanem normalnego kodu po mret.

", "steps": [] }, { "id": "task02.a7", "kind": "block", "title": "A7 RUNTIME · AKTYWNE — cause z bitem 31", "content_html": "

Wartość 0x80000003 łączy bit interrupt i kod 3. Listing ma pokazać CSR dla mie/mstatus/mip, dostęp do testbench clear oraz mret. Oracle wymaga całego śladu, nie tylko pass.

", "steps": [] }, { "id": "task02.a8", "kind": "block", "title": "A8 PATTERNS · AKTYWNE — clear level source before publish", "content_html": "

Źródło poziomowe usuwa się przed opublikowaniem ukończenia ISR. Gdyby licznik wzrósł bez clear, po mret żądanie pozostałoby aktywne i handler mógłby wejść ponownie.

", "steps": [] }, { "id": "task02.proof", "kind": "exercise", "title": "Przewidywanie → wykonanie → wniosek", "content_html": "", "steps": [] }, { "id": "task02.worksheet", "kind": "block", "title": "TASK02 · Zapis dowodu ucznia", "content_html": "

1. Przewidywanie przed uruchomieniem \\noindent \\noindent 2. Pending i bramki przed wejściem \\noindent \\noindent 3. mcause, clear, mret i wznowienie \\noindent \\noindent 4. Wniosek: reguła języka lub kontrakt targetu potwierdzony przez pomiar \\noindent \\noindent

", "steps": [] } ] } ], "assets": [], "steps": [], "spread_group": "", "spread_label": "", "spread_columns": 1, "spread_index": 1, "spread_count": 1, "page_orientation": "portrait" }, { "id": "section-6-task03", "index": 6, "title": "TASK03 — Macierz pending, MSIE i MIE", "show_heading": true, "toc_entry": true, "header_html": "
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
TITLEPułapki i sterowanie przerwaniami RV32I
VER.v00.01
DATETIME2026-07-20T00:00:00+02:00
PROJECTFreestanding C na RV32I
SERIESC · Freestanding RV32I and K&R
CARD10/13
SHEET7/7
SUBJ.Inf.
PROG.
CORE
SCOPE
LEVEL
POS.
GITEA UUIDec04ecee-1c4d-529a-a4e2-d3f9b40700ecCARD UUID8fb9c110-557b-5081-8ae2-a56800f872e8AUTHOR  M. Pabiszczak
\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
", "left_margin_html": "
TECH
", "right_margin_html": "
OG
", "content_html": "", "tasks": [ { "ref": "task03", "title": "Macierz pending, MSIE i MIE", "uuid": "f56dba83-f7a9-5643-8f2e-84df1e8a2190", "criterion": "Hazard3: pending=1, blocked_no_msie=1, blocked_no_mie=1, delivered_both=1, count=1, mcause=0x80000003, pending_after=0, pass=1 i kod 0.", "conclusion_html": "", "prompt_html": "

Wypełnij trzy wiersze: pending=1 z samym MIE, pending=1 z samym MSIE oraz pending=1 z obiema bramkami. Przewidź licznik ISR i końcowy pending.

", "flow": [ { "id": "task03.a1", "kind": "block", "title": "A1 CONTEXT · AKTYWNE — jedna zmienna, dwie kontrolki", "content_html": "

Zachowany przykład: \\nolinkurl{src/tasks/task03_pending_enable_matrix.c}. Bodziec MSIP pozostaje ten sam podczas dwóch prób blokowanych i próby dostarczonej. Przykład zmienia wyłącznie bramki rdzenia, więc nie myli nowego zdarzenia z nową konfiguracją.

", "steps": [] }, { "id": "task03.a2", "kind": "block", "title": "A2 STRUCTURE · AKTYWNE — macierz 1×2×2", "content_html": "

Oś danych to pending=1. Dwie osie sterujące to MSIE i MIE. Cztery kombinacje mają jeden stan dostarczalny: oba bity 1. Przykład mierzy trzy istotne wiersze przy utrzymanym pending.

", "steps": [] }, { "id": "task03.a3", "kind": "block", "title": "A3 DISPATCH · AKTYWNE — wejście dopiero dla 1/1", "content_html": "

Sprzętowy dispatch do vector 3 nie zachodzi przy żadnej pojedynczej otwartej bramce. Dopiero MSIE=1 i MIE=1 pozwalają utworzyć trap, zapisać cause i wejść do ISR kończącego się mret.

", "steps": [] }, { "id": "task03.a4", "kind": "block", "title": "A4 APPLICATION · AKTYWNE — dwa razy blocked, raz delivered", "content_html": "

Przy MIE=1/MSIE=0 licznik zostaje 0. Przy MIE=0/MSIE=1 również zostaje 0. Przy obu równych 1 rośnie dokładnie do 1, mcause ma wartość 0x80000003, a clear zeruje pending.

", "steps": [] }, { "id": "task03.a5", "kind": "block", "title": "A5 FLOW · AKTYWNE — nie zmieniaj źródła między próbami", "content_html": "

Program podnosi MSIP raz, następnie testuje global-only, individual-only i both. Globalny bit jest zamykany przed zmianą MSIE, aby dostarczenie nie zaszło między pomiarem a zapisaniem wyniku.

", "steps": [] }, { "id": "task03.a6", "kind": "block", "title": "A6 STATE · AKTYWNE — P10, P01, P11, CLEAR", "content_html": "

Skrót Pxy oznacza pending=1, MSIE=x, MIE=y. Ślad to P01(blocked) -> P10(blocked) -> P11(active) -> CLEAR. Licznik zmienia się tylko na trzeciej krawędzi.

", "steps": [] }, { "id": "task03.a7", "kind": "block", "title": "A7 RUNTIME · AKTYWNE — odczyt mip, zapisy mie/mstatus", "content_html": "

Raport utrwala trzy decyzje i cause. Listing rozdziela csrs/csrc mie, csrs/csrc mstatus oraz odczyt mip. Objdump niezależnie potwierdza mret w ISR.

", "steps": [] }, { "id": "task03.a8", "kind": "block", "title": "A8 PATTERNS · AKTYWNE — source, individual, global gate", "content_html": "

Trzywarstwowy model zapobiega typowemu błędowi: pending nie znaczy delivered. Ten sam wzorzec wróci dla MTIP/MTIE oraz external IRQ z enable peryferium, kontrolera i globalnym MIE.

", "steps": [] }, { "id": "task03.proof", "kind": "exercise", "title": "Przewidywanie → wykonanie → wniosek", "content_html": "", "steps": [] }, { "id": "task03.worksheet", "kind": "block", "title": "TASK03 · Zapis dowodu ucznia", "content_html": "

1. Przewidywanie przed uruchomieniem \\noindent \\noindent 2. Macierz pending/MSIE/MIE \\noindent \\noindent 3. Dostarczenie, clear i kod wyjścia \\noindent \\noindent 4. Wniosek: reguła języka lub kontrakt targetu potwierdzony przez pomiar \\noindent \\noindent

", "steps": [] } ] } ], "assets": [], "steps": [], "spread_group": "", "spread_label": "", "spread_columns": 1, "spread_index": 1, "spread_count": 1, "page_orientation": "portrait" } ], "viewpoints": [], "has_spread": false, "has_allocator_model": false, "dictionary": null, "toc": [ { "id": "section-1-content", "label": "1. 1 — Wyjątek synchroniczny wskazuje instrukcję" }, { "id": "section-2-content", "label": "2. 2 — Software IRQ jest asynchronicznym źródłem poziomowym" }, { "id": "section-3-content", "label": "3. 3 — Pending i enable odpowiadają na inne pytania" }, { "id": "section-4-task01", "label": "4. TASK01 — ECALL i wznowienie pod mepc+4" }, { "id": "section-5-task02", "label": "5. TASK02 — Machine software IRQ i clear źródła" }, { "id": "section-6-task03", "label": "6. TASK03 — Macierz pending, MSIE i MIE" } ] }