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feat(rv32i-asm): complete L01-L09 series

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M. Pabiszczak
2026-07-21 19:02:14 +02:00
parent 558d53b0c6
commit 9f1b2399a8
3 changed files with 50 additions and 9 deletions
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catalog/rv32i-asm.json
+2 -2
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@@ -3,8 +3,8 @@
"title": "ASM · RV32I From Blinker to RISC-V",
"catalog_only": true,
"cards": [
{"id": "L01", "repo": "lab-rv32i-asm-number-systems", "number": "01", "title": "Number Systems and Storage", "status": "planned"},
{"id": "L02", "repo": "lab-rv32i-asm-fpga-bringup", "number": "02", "title": "FPGA Bring-up and Programming", "status": "planned"},
{"id": "L01", "repo": "lab-rv32i-asm-number-systems", "number": "01", "title": "Number Systems and Storage", "status": "existing"},
{"id": "L02", "repo": "lab-rv32i-asm-fpga-bringup", "number": "02", "title": "FPGA Bring-up and Programming", "status": "existing"},
{"id": "L03", "repo": "lab-rv32i-asm-blinker", "number": "03", "title": "Blinker and Synchronous Logic", "status": "existing"},
{"id": "L04", "repo": "lab-rv32i-asm-decoder", "number": "04", "title": "The RISC-V ISA and Instruction Decoder", "status": "existing"},
{"id": "L05", "repo": "lab-rv32i-asm-alu", "number": "05", "title": "ALU and the Verilog Assembler", "status": "existing"},