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lab-rv32i-freertos-c-delay-…/web/figures/a2-structure.puml
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@startuml
!include card-uml-style.iuml
scale 900 width
left to right direction
class "01 PeriodicContext" as Periodic <<C struct>> {
handle · created_handle
phase
initial_tick
release_tick[3]
entry_sp · stack range
}
class "02 SuspendContext" as Suspend <<C struct>> {
handle · created_handle
phase
resumed
entry_sp
}
class "03 ObserverContext" as Observer <<C struct>> {
handle
periodic_state : eTaskState
suspend_state : eTaskState
pass
}
class "04 periodic timeline" as Timeline <<bounded record>> {
t0
t0 + 2
t0 + 4
t0 + 6
}
Periodic --> Timeline : vTaskDelayUntil
Observer --> Periodic : eTaskGetState
Observer --> Suspend : eTaskGetState · vTaskResume
Observer --> Timeline : verifies exact deltas
@enduml