user
48 lines
1.9 KiB
Markdown
48 lines
1.9 KiB
Markdown
# K15 — Explicit FromISR, UART and GPIO wrappers
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## Position
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- Series: FreeRTOS C++
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- Lesson: L14, card K15
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- Duration: 30 minutes
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- Real machine-external interrupt on Hazard3
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- Queue capacity 1 with drop-newest overflow
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## Outcome
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The student distinguishes task and ISR driver views, publishes UART/GPIO events
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only through explicit FromISR APIs, accumulates one wake decision, yields once,
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and proves backpressure plus immediate high-priority task execution.
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## Lesson plan
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| Time | Mode | Evidence |
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| --- | --- | --- |
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| 0–5 | ISR contract | task/ISR views and one IsrContext |
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| 5–10 | real IRQ | mcause=0x8000000b and separate ISR stack |
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| 10–15 | UART queue | 0x41 queued, 0x42 drop-newest |
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| 15–20 | GPIO notify | edge 1→0, notification count 1 |
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| 20–25 | wake/yield | accumulated wake=true, exactly one yield |
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| 25–30 | context switch | receiver at tick 1 before stimulus resumes |
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## Acceptance
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- the interrupt is a real machine-external IRQ through the FreeRTOS trap path;
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- Uart and GpioPin expose distinct task and ISR views;
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- only xQueueSendFromISR and vTaskNotifyGiveFromISR are used in the handler;
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- one IsrContext accumulates both wake requests;
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- RX queue capacity 1 accepts 0x41 and drop-newest rejects/counts 0x42;
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- UART ready and GPIO edge MMIO-model state clear from 1 to 0;
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- higherPriorityTaskWoken is true and yield_if_needed is called once;
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- receiver gets byte 0x41 and notification count 1 at tick 1;
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- receiver sees stimulus_after=0; stimulus later sees receiver_done=1;
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- static storage has heap delta zero and target exits with PASS.
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## Main traps
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1. Calling an ordinary blocking API from an ISR.
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2. Automatically guessing execution context instead of explicit views.
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3. Yielding after each primitive rather than once at handler exit.
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4. Ignoring queue overflow or silently overwriting data.
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5. Performing parsing, debounce or long GPIO policy in the handler.
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