user
5 lines
502 B
Systemverilog
5 lines
502 B
Systemverilog
module tb;
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logic reset_n, button_n, led_on, reset, button, led_n; string trace_file; pin_polarity dut(.*);
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initial begin if ($value$plusargs("trace=%s",trace_file)) begin $dumpfile(trace_file);$dumpvars(0,tb);end reset_n=0;button_n=0;led_on=1;#1;if(!reset||!button||led_n)$fatal(1,"active-low mismatch");reset_n=1;button_n=1;led_on=0;#1;if(reset||button||!led_n)$fatal(1,"inactive mismatch");$display("PASS task01 reset_active=1 button_active=1 led_n=0 pin_contract=generic");$finish;end
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endmodule
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